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Invalid instruction pointer

I have been working on a problem with an installed product for
approximately a year now.  After much investigation including careful
review of the code and repeat of ANSI hardware testing, we have been
unable to recreate the problem in house.  However, through analysis of
the symptoms we have come to believe that something is causing the
instruction pointer in this embedded application to be pointed to the
wrong code address.

My question is what external events can affect a microprocessor in
such a way that it essentially gets "lost" in execution?  We are
reasonably certain that an external event is the cause, rather than a
stack problem, as the majority of the installed product are working
fine and have been for over a year.

The microprocessor we are using does not have an illegal instruction
trap or watchdog timer, so in order to fix the problem, we would
likely need hardware modifications.  I would like any information that
any of you might have gleaned in past experience with similar issues
so that we can pursue testing based on most likely causes.

0
7/24/2007 3:54:30 PM
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ginger.zinkowski@ge.com wrote:

<snip>
> 
> My question is what external events can affect a microprocessor in
> such a way that it essentially gets "lost" in execution?  We are
> reasonably certain that an external event is the cause, rather than a
> stack problem, as the majority of the installed product are working
> fine and have been for over a year.
> 
> The microprocessor we are using does not have an illegal instruction
> trap or watchdog timer, so in order to fix the problem, we would
> likely need hardware modifications.

<snip>

I have a project that is using salvaged components (desoldered ICs with
short leads) installed in tin-plate sockets; with temp. and humidity
changes, the parts move and integrity of connections suffers so that
the mcu does bad external memory fetches.  All unused areas of the
firmware store contain a 'jump relative to self' instruction so that
when the execution goes south I can reset and debug with less chance
of losing state.  Is your product using socketed ICs?

I also have some projects working in very harsh RFI environments;
these necessitated complete enclosure in tin can faraday shields,
together with ample power rail isolation and ferrite bead installations
in order to stop the glitches. What is the operating environment of
your product?

Regards,

Michael

0
msg
7/24/2007 5:45:59 PM
ginger.zinkowski@ge.com wrote:
> I have been working on a problem with an installed product for
> approximately a year now.  After much investigation including careful
> review of the code and repeat of ANSI hardware testing, we have been
> unable to recreate the problem in house.  However, through analysis of
> the symptoms we have come to believe that something is causing the
> instruction pointer in this embedded application to be pointed to the
> wrong code address.
> 
> My question is what external events can affect a microprocessor in
> such a way that it essentially gets "lost" in execution?  We are
> reasonably certain that an external event is the cause, rather than a
> stack problem, as the majority of the installed product are working
> fine and have been for over a year.
> 
> The microprocessor we are using does not have an illegal instruction
> trap or watchdog timer, so in order to fix the problem, we would
> likely need hardware modifications.  I would like any information that
> any of you might have gleaned in past experience with similar issues
> so that we can pursue testing based on most likely causes.
> 
Intel issued an app-note many years ago (for the 8048, no less!), 
"Designing High-Reliability Software for Automotive Applications", or 
something like that. It assumed that someone would be careless with a 
hot sparkplug lead some day, & the CPU would make a random jump to *any* 
accessible location. The idea was to be able to recover from that.
  They programmed in assembler, not C, which allowed some cunning 
tricks. Instance, share out the unused ROM space, so that there is a 
dead zone after every unconditional jump/return. Fill such space with 
jumps to recovery code. There was much more in that vein. (Sorry, I 
don't have a copy to hand.)
0
davebXXX (145)
7/24/2007 6:25:48 PM
On Jul 24, 11:54 am, ginger.zinkow...@ge.com wrote:
> I have been working on a problem with an installed product for
> approximately a year now.  After much investigation including careful
> review of the code and repeat of ANSI hardware testing, we have been
> unable to recreate the problem in house.  However, through analysis of
> the symptoms we have come to believe that something is causing the
> instruction pointer in this embedded application to be pointed to the
> wrong code address.
>
> My question is what external events can affect a microprocessor in
> such a way that it essentially gets "lost" in execution?  We are
> reasonably certain that an external event is the cause, rather than a
> stack problem, as the majority of the installed product are working
> fine and have been for over a year.
>
> The microprocessor we are using does not have an illegal instruction
> trap or watchdog timer, so in order to fix the problem, we would
> likely need hardware modifications.  I would like any information that
> any of you might have gleaned in past experience with similar issues
> so that we can pursue testing based on most likely causes.

Stack overruns are only one source of this kind of problem. (And you
are absolutely 100% positively certain with no doubt that it is not a
stack overrun?)

The overrun does not have to be corrupting the stack.
 does the code run from RAM?
 You may have had a pointer overwrite code with some data.

 Do you have any state machine tables that use function pointers?
 You may have a bad state value so that you jump to a non-existant
function.

 Do you have fully debugged interrupt routines?
 You might be forgetting to push/pop a value on the stack in some
certain special case.

 Are you 100% sure the hardware is working?
 No overclocking the CPU or memory? Do you run diagnostics on power-
up? ESD protection??

What is the difference between your lab set up and the field? There
could be some keys there.
(In this regard, I spent nearly a year trying to debug an intermittent
freeze up on a machine. In the lab I ran the system using an ICE (In
Circuit Emulator). I finally concluded there was a hardware issue and
using the ICE changed the impedance of the circuit enough to avoid the
problem. (Of course we couldn't ship an ICE with each unit sold!)

Without knowing your code, only vague generalities like above come to
mind.

It is very hard to track down intermittent problems. Patience and lots
of information are required. You need a lot of evidence to push the
problem to the hardware side. That's why I'll end the way I started:
Are you really sure this is not a buffer overrun (stack) issue?

HTH,
  Ed Prochak
Let me know if you want more detailed help off-line

0
edprochak (546)
7/24/2007 6:40:36 PM
On Jul 24, 10:54 am, ginger.zinkow...@ge.com wrote:

> We are
> reasonably certain that an external event is the cause, rather than a
> stack problem, as the majority of the installed product are working
> fine and have been for over a year.

That's a fairly risky basis for certainty.  The one problem unit may
be experiencing very different task loading, external timing
intervals, etc than the others.  Just because most of them work
doesn't mean they don't all have a deadly bug.

If you cannot recreate the failure, you will probably have to go to
the problem location and try modifications to both software and
hardware.  Add tracing output.  Change the power supply to an external
one.  Add shielding.  Etc... figure out what it is that makes the
difference.

Also, you may not have dedicated trap capabilities, but with some care
you may be able to insert jumps to a trap routine between your
operational code and data.

0
cs_posting (544)
7/24/2007 6:51:17 PM
ginger.zinkowski@ge.com wrote:
> My question is what external events can affect a microprocessor in
> such a way that it essentially gets "lost" in execution?  We are
> reasonably certain that an external event is the cause, rather than a
> stack problem, as the majority of the installed product are working
> fine and have been for over a year.

Not long ago, I was working on a PowerPC 860 operating
at 3.3V that had an 74HCxxx OR gate operating at 5V
driving an interrupt input. Occasionally, an undershoot
of about 2.5V on the interrupt would cause the system
to go out into the weeds. The moral of the story is...
beware of mixed voltage system and fast edges ;-)

-- 
Michael N. Moran           (h) 770 516 7918
5009 Old Field Ct.         (c) 678 521 5460
Kennesaw, GA, USA 30144    http://mnmoran.org

"So often times it happens, that we live our lives in chains
  and we never even know we have the key."
"Already Gone" by Jack Tempchin (recorded by The Eagles)

The Beatles were wrong: 1 & 1 & 1 is 1
0
mnmoran (182)
7/24/2007 11:57:26 PM
ginger.zinkowski@ge.com wrote:
> I have been working on a problem with an installed product for
> approximately a year now.  After much investigation including careful
> review of the code and repeat of ANSI hardware testing, we have been
> unable to recreate the problem in house.  However, through analysis of
> the symptoms we have come to believe that something is causing the
> instruction pointer in this embedded application to be pointed to the
> wrong code address.
> 
> My question is what external events can affect a microprocessor in
> such a way that it essentially gets "lost" in execution?  We are
> reasonably certain that an external event is the cause, rather than a
> stack problem, as the majority of the installed product are working
> fine and have been for over a year.
> 
> The microprocessor we are using does not have an illegal instruction
> trap or watchdog timer, so in order to fix the problem, we would
> likely need hardware modifications.  I would like any information that
> any of you might have gleaned in past experience with similar issues
> so that we can pursue testing based on most likely causes.
> 
Electrical noise.
Insufficient filtering or decoupling.
Noisy peripherals (solenoids or Motors).
0
NeilKurzm (321)
7/25/2007 6:46:17 AM
On Tue, 24 Jul 2007 08:54:30 -0700, ginger.zinkowski wrote:

> I have been working on a problem with an installed product for
> approximately a year now.  After much investigation including careful
> review of the code and repeat of ANSI hardware testing, we have been
> unable to recreate the problem in house.  However, through analysis of
> the symptoms we have come to believe that something is causing the
> instruction pointer in this embedded application to be pointed to the
> wrong code address.
> 
> My question is what external events can affect a microprocessor in
> such a way that it essentially gets "lost" in execution?  We are
> reasonably certain that an external event is the cause, rather than a
> stack problem, as the majority of the installed product are working
> fine and have been for over a year.
> 
> The microprocessor we are using does not have an illegal instruction
> trap or watchdog timer, so in order to fix the problem, we would
> likely need hardware modifications.  I would like any information that
> any of you might have gleaned in past experience with similar issues
> so that we can pursue testing based on most likely causes.

Some of these are repeats of what others have said:

* Voltage spikes.  Is the power supply or some inputs to the processor
  exceeding the allowable input limits?

* Brown-outs.  Is the power supply dipping below the recommended 
  minimum voltage?

* Interrupt frequency.  Is some external process causing an interrupt
  to be hammered at a much higher frequency than you anticipated?  This
  can cause problems by disturbing the timing of other code, or by
  using a higher than anticipated amount of memory on the stack (or
  stacks, if you use a kernel that puts interrupt responses on the task
  stacks).

* Noisy communication.  Is the equipment that your thing is connected
  to sending invalid comms data, or is your comms data getting
  otherwise corrupted?  Bad comms data in conjunction with fragile
  parsing could lead to stack overflows, memory leaks, or other primary
  faults that then result in branches to East Fishkill.

In summary:  Look for strange electrical events that are either taking the
pins of the processor out of their safe operating range, or look for
environmental effects that are unusual and may be lighting up software
bugs that you never tested for.

If you can, you should make some software that's instrumented for things
like heap usage (if you use a heap), buffer usage for all your comms,
stack usage, etc., and that either logs events (carefully -- event logging
can cause problems on its own) or that saves the state of the machine for
later analysis.  Then try to use these results to further your
investigations.

-- 
Tim Wescott
Control systems and communications consulting
http://www.wescottdesign.com

Need to learn how to apply control theory in your embedded system?
"Applied Control Theory for Embedded Systems" by Tim Wescott
Elsevier/Newnes, http://www.wescottdesign.com/actfes/actfes.html
0
tim177 (4433)
7/25/2007 2:45:39 PM
David R Brooks wrote:

> Intel issued an app-note many years ago (for the 8048, no less!), 
> "Designing High-Reliability Software for Automotive Applications", or 
> something like that. It assumed that someone would be careless with a 
> hot sparkplug lead some day, & the CPU would make a random jump to *any* 
> accessible location. The idea was to be able to recover from that.
> They programmed in assembler, not C, which allowed some cunning tricks. 
> Instance, share out the unused ROM space, so that there is a dead zone 
> after every unconditional jump/return. Fill such space with jumps to 
> recovery code. There was much more in that vein. (Sorry, I don't have a 
> copy to hand.)

Are you perhaps referring to the following document?
Designing Microcontroller Systems for Electrically Noisy Environments
http://www.intel.com/design/auto/mcs96/applnots/210313.htm

Which itself refers to the following document:
Yarkoni, B. and Wharton, J.
Designing Reliable Software for Automotive Applications
SAE Transactions, 790237, July 1979

cf. also http://www.intel.com/design/auto/docs_auto.htm
0
Spoon
7/25/2007 4:26:57 PM

Spoon wrote:

> David R Brooks wrote:
>
> > Intel issued an app-note many years ago (for the 8048, no less!),
> > "Designing High-Reliability Software for Automotive Applications", or
> > something like that.
>
> Are you perhaps referring to the following document?
> Designing Microcontroller Systems for Electrically Noisy Environments
> http://www.intel.com/design/auto/mcs96/applnots/210313.htm
>
> Which itself refers to the following document:
> Yarkoni, B. and Wharton, J. Designing Reliable Software for Automotive Applications
> SAE Transactions, 790237, July 1979
>
> cf. also http://www.intel.com/design/auto/docs_auto.htm

see also

http://www.dbicorporation.com/esd-anno.htm

w..



0
walter20 (887)
7/25/2007 5:35:34 PM
Spoon wrote:
> David R Brooks wrote:
> 
>> Intel issued an app-note many years ago (for the 8048, no less!), 
>> "Designing High-Reliability Software for Automotive Applications", or 
>> something like that. It assumed that someone would be careless with a 
>> hot sparkplug lead some day, & the CPU would make a random jump to 
>> *any* accessible location. The idea was to be able to recover from that.
>> They programmed in assembler, not C, which allowed some cunning 
>> tricks. Instance, share out the unused ROM space, so that there is a 
>> dead zone after every unconditional jump/return. Fill such space with 
>> jumps to recovery code. There was much more in that vein. (Sorry, I 
>> don't have a copy to hand.)
> 
> Are you perhaps referring to the following document?
> Designing Microcontroller Systems for Electrically Noisy Environments
> http://www.intel.com/design/auto/mcs96/applnots/210313.htm
> 
> Which itself refers to the following document:
> Yarkoni, B. and Wharton, J.
> Designing Reliable Software for Automotive Applications
> SAE Transactions, 790237, July 1979
> 
> cf. also http://www.intel.com/design/auto/docs_auto.htm

Yes indeed :-)
Yarkoni & Wharton is the one I was thinking of.
0
davebXXX (145)
7/25/2007 10:15:26 PM
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Q . When to use use pointer-to-pointer and reference-to-pointer to modify a pointer passed to a function ? According to me Which is better : double pointers OR Reference to Pointer ? There is no clear advantage and depends on programmer =91s choice or habit . As Nilesh mentioned =94 Reference to pointer=94 makes code easy But Pointer to pointer makes code easy to understand. So one can use any one . Why Pointer to Pointer is generally used ? 1. Pointer to pointer can be used in C and C++ but reference to pointer is limited to C++. a. Generally people start learning programming from C . So they get used to pointer to pointer. b.Pointer to Pointer usage makes project porting in C or C++ easy. 2. Generally libraries uses pointer to pointer approach like COM uses pointer to pointer for CoCreateInstance or QueryInterface. Fourm : Could you please let me know if these are the only reasons or i am missing something? Thanks Vikrant Example #include "stdafx.h" void Ref2Poi(int * &p) { *p =3D 10; } void Poi2Poi( int ** p) { **p =3D 10; } int _tmain(int argc, _TCHAR* argv[]) { int i =3D 13; int j =3D 14; int *p =3D &i; int *q =3D &j; Ref2Poi(p); Poi2Poi(&q); return 0; } "bansalvikrant@gmail.com" <bansalvikrant@gmail.com> writes: > Q . When to use use pointer-to-pointer and reference-to-pointer to > modify a pointer passed to a function ? &g...

Invalid pointer dereference, or not?
Hi all, I was quite baffled to see this (simplified) program run without segfaults, and without valgrind complaining about invalid memory reads. <code> #include <iostream> using namespace std; class A { public: A() { cout << "A()" << endl; } ~A() { cout << "~A()" << endl; } void print() const { cout << "Hello World" << endl; } }; int main() { A* a; a->print(); // Should segfault, shouldn't it? a = new A(); a->print(); delete a; a->print(); // Should segfault, shouldn't it? ...

munmap_chunk(): invalid pointer
Dear all ; Would you please guide me what does the following message means? (I get this message when I run my code which has been compiled with gfortran.) gcc version 4.2.1 (SUSE Linux) *** glibc detected *** ./a.out: munmap_chunk(): invalid pointer: 0x0817d2a8 *** ======= Backtrace: ========= /lib/libc.so.6[0xb7df94b6] /usr/lib/libgfortran.so.2(_gfortran_internal_free+0x21)[0xb7f062a1] ../a.out[0x805e782] ../a.out[0x805c4e4] ../a.out[0x805bfc6] ../a.out[0x805abcb] ../a.out[0x8170767] /lib/libc.so.6(__libc_start_main+0xe0)[0xb7da8fe0] ../a.out[0x8048f41] ======= Memory map: ======== 08048000...

Fiddling with the Instruction Pointer
Hello, It has been long since I did anything with x86 assembler and now I'm starting a small hobby project. What I would like to do is monitor the instructions that the x86 machine is performing and when certain conditions occur I would like to perform other operations instead of those in the instruction pointer. Could someone give me pointers how to do this with your regular x86 Windows XP machines. For example how to write an app that constantly monitors the IP? Best, - Sami Sami Lakka <spamtrap@crayne.org> wrote: > example how to write an app that constantly moni...

Sampling the instruction pointer...
Hi, I would like to write a piece of code that periodically samples the instruction pointer into a fixed size circular buffer that can be written to disk whenever I want. I gather I need to implement some sort of VxD or ISR to do this, but have no idea where to start. Can someone point me at some code to do this? I'm guessing I need to know how to hook the timer interrupt, and do IO with a thread to exchange the buffer when requested. Thanks Justin ...

embeded a pointer or reference
When doing composition between classes A and B in C++, shall B be embedded in A as a reference or pointer? Why should embedding a object itself be avoided? Thanks! "sci" <sci@focus.com> wrote in message news:DYJec.13757$K_.443364@bgtnsc05-news.ops.worldnet.att.net... > When doing composition between classes A and B in C++, shall B be embedded > in A as a reference or pointer? Why should embedding a object itself be > avoided? Thanks! Now, I'm far from an expert, but I see no reason not to embed the object directly if B is conceptually owned by A. On the other hand, if many classes need to access the same B, they would need to have pointers to it instead. You can't have references as members in a C++ class. Erik "sci" <sci@focus.com> wrote: > When doing composition between classes A and B in C++, shall B be embedded > in A as a reference or pointer? Why should embedding a object itself be > avoided? Thanks! class A { B itsB; }; Is good when you know A will never want a derived class of B, you know that A must always have a B, and you know that A will never want to give its B away or share it. class A { B* itsB; }; Is good when you want A to be able to use derived classes of B, A can live for some time without an actual B object, or A must be able to give away or share its B object. (It would be better to use a smart pointer of some sort though.) class A { B& itsB; }; Is good when...

Dynamic Array and Invalid Pointer
Alas, I have tried this also. Same result. Thanks, zdrakec "zdrakec" wrote in message news:39239f63.0404280742.2f560cc1@posting.google.com... [...] > If I attempt to free the [dynamic] array with > > (dtID := nil); That's no way to treat an array. An array is not a pointer, didn't anybody tell you? Just SetLength it to zero elements. Groetjes, Maarten Wiltink At 20:53:03, 28.04.2004, zdrakec wrote: > Alas, I have tried this also. Same result. > > Thanks, > zdrakec > > "zdrakec" wrote in message &g...

pointer to a pointer problems
An open book test I am taking, tasked me to write a function with the following prototype. Yea, its a test, so don't give me the implementation. But it is open book, so maybe I can at least get a few questions answered. // returns the next token in a string found seperated by the delimeter. upon return updates str to point to the next token in // the string after the one returned const char * nextToken(const char ** str, const char delimeter); When I look at this, it looks very c-style to me. I think it is unsafe. 1) I don't see a way to return a different string without allocating ...

pointer-to-pointer to char
The following code can be compiled. But When I run it, it causes "Segmentation fault". int main(){ char **c1; *c1 = "HOW"; // LINE1 ++(*c1); *c1 = "ARE"; ++(*c1); *c1 = "YOU"; } c1 is a pointer-to-pointer to char. How to initialize c1 to three strings: "HOW", "ARE", "YOU"? Thanks a lot. Jack wrote: > The following code can be compiled. But When I run it, it causes > "Segmentation fault". > > int main(){ > char **c1; > > *c1 = "HOW"; // LINE1 > c1 doesn...

pointers to pointers question
How come something like: #include <stdio.h> int main(int argc, char **argv) { char **arg; int i; for ( i = 0; argv[i] != NULL; ++i ) { puts(argv[i]); } for ( arg = argv; *arg != NULL; ++arg ) { puts(*arg); } return 0; } doesn't require a explicit & before argv in the for loop, but something like #include <stdio.h> #include <stdlib.h> int main(void) { char *ptr = "Garbage"; char **pptr; pptr = &ptr; printf("The value is: % s\n", *pptr); } does require an explict & Chad Chad w...

tlb invalidation/timings/instructions
[ I posted this to comp.sys.intel but received no response. Hopefully one of you comp.arch gurus can help out.] Intel offers two ways of invalidating entries in the TLB: INVLPG which invalidates a single entry, and replacing %cr3 which clears the entire TLB. What are the timings for these? I've been unable to find them looking in the IA-32 manuals as well as some of the data sheets. The question is important in order to determine at which point it becomes worthwhile to clear the entire tbl in one swoop as opposed to do it for each page. In addition, we see the following passage (all re...

Why pointers to pointers used
I have used many OSS libraries which have a common structure like the following: They have init function which takes a pointer to pointer to the module data structure like this: module_init(struct module_ds ** p,.....); And usage example is like following: struct module_ds * p; p = NULL; module_init(&p,....); etc. Now i'm wondering why they do it this way? if i pass a plain pointer then it should be ok to declare a local pointer and allocate and initialize it. after initialization it can be returned by the fuction. but they always have a void type. Even if they remain "void" still it should be possible to allocate, and initialize a local pointer and assign it to a plain pointer comes as a argument? Or "local" pointer is key here? Thanks in advance. > Now i'm wondering why they do it this way? if i pass a plain pointer then it > should be ok to declare a local pointer and allocate and initialize it. after > initialization it can be returned by the fuction. If you want to return (Type*), you have to either have the function return it Type *function(...); Type *var = function(...); assign it to an output parameter void function(Type **var,...); Type *var; function(&var, ...); or assign it to/through a global variable extern Type *functionvalue; voidfunction(...); function(...); Type *var = functionvalue; I prefer the first with the general paradigm of output = function(input) Howeve...

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