VirtexII bitstream relocation2121 (7/1/2003 10:01:07 PM) Hi all I have questions about bitstream relocation in VirtexII FPGAs. We have already developed software based on the old Jbits package from Xilinx for doing small bits manipualations bitstream relacation for ... ecarvalho(1)
Using Quarus to create SVF files?0139 (7/3/2003 2:37:43 PM) Is there a way to generate SVF files in Quartus II? If not, is there a way to convert JAM files to SVF? TIA Petter -- A: Because it messes up the order in which people normally read text. Q: Why is top-post... Petter
What a fascinating board!1216 (7/3/2003 7:34:59 AM) Who makes the best FPGA? Lattice or Cypress? ... seannstifler69
RE:can you please post a summary of your findings to the group?0114 (7/3/2003 12:10:48 PM) -----Original Message----- From: Arrigo Benedetti [mailto:arrigo@bologna.vision.caltech.edu] Sent: 02 July 2003 15:06 To: Aziz AhmedSaid Subject: Re: Does anyone know about hardware implementations of the SVD ?... Aziz
FPGA Editor and Xilinx ISE 5.1i2123 (7/2/2003 10:11:20 AM) Hi all! I'm trying to make a hard macro of a design and I got that error: FATAL_ERROR:Ncd:basncmacrodef.c:1466:1.19.2.1 - Mangled nmc file start property read Seems like the FPGA Editor tool ha... santi
Discrepancy in CLB Usage Report197 (7/2/2003 4:29:06 PM) Hi, I am using the following flow: VHDL - Entry Synplify Pro - Synthesis Xilinx Design Manager - Post synthesis, place and route, etc. The target device is Xilinx Spartan XL - XCS20XL. I am trying ... Anand
ARM C/C++ compiler independent of OS1155 (7/2/2003 2:54:35 AM) i want to use some ARM C/C++ compiler which is independent of the operating system. What i am looking for is plain translation of my C/C++ benchmarking code into plain ARM assebly and then into binaries... if i... kartik20
New FPGA RISC C-NIT0124 (7/2/2003 8:46:49 PM) Visit the website for C-NIT at http://www.c-nit.net Sumit ... do_not_post_to_thisa
Combining Distributed RAM and Block RAM1139 (7/2/2003 2:49:36 PM) Hi, I need to use a memory with 37bits width. If I take a Block RAM Primitive RAMB16_S36_S36, 36 bits can be utilised for storage (32bits data + 4bits parity) But I don't want to instantiate another Block RAM... muthu_nano(11)