FPGA/CPLD from logic diagram?

Hi.Can anyone help? I am completely new to FPGA's and wonder if any of the many PLD-type manufacturers provides software to take a schematic/logic digram and enter this in some way to compile the program for the chip, without having to start to learn VHDL or Verilog. The circuit to be made into a chip would consiste of say 12 decade counters similar to the CD4518, 5 7-segment decoder similar to CD4511 and a few bits of random 'glue'. TIA Alistair Macfarlane

"K4MON" <k4mon@aol.com> wrote in message news:20040811120212.11415.00002174@mb-m23.aol.com... > Hi.Can anyone help? > I am completely new to FPGA's and wonder if any of the many PLD-type > manufacturers provides software to take a schematic/logic digram and enter this > in some way to compile the program for the chip, without having to start to > learn VHDL or Verilog. The circuit to be made into a chip would consiste of say > 12 decade counters similar to the CD4518, 5 7-segment decoder similar to CD4511 > and a few bits of random 'glue'. The Altera Quartus software allows schematic entry. Leon

You can download the free Webpack software from Xilinx website. This has ECS schematic entry software included. --Neeraj "K4MON" <k4mon@aol.com> wrote in message news:20040811120212.11415.00002174@mb-m23.aol.com... > Hi.Can anyone help? > I am completely new to FPGA's and wonder if any of the many PLD-type > manufacturers provides software to take a schematic/logic digram and enter this > in some way to compile the program for the chip, without having to start to > learn VHDL or Verilog. The circuit to be made into a chip would consiste of say > 12 decade counters similar to the CD4518, 5 7-segment decoder similar to CD4511 > and a few bits of random 'glue'. > TIA > Alistair Macfarlane

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7/30/2012 3:49:27 AM