Hi

I am using Xilinx Sapartan 3 . I have wrote HDL in verilog for testing an
external memory attached to FPGA. Mapping end up with error. 

Pack:2309 - Too many bonded comps of type "IOB" found to fit this device.


I am a beginner in this field. In the first place , It seems that I am
using more resources than the FPGA can provide ? . 

Please suggest ,  how to get rid of this error

Thanks and Regards

Faisal

	   
					
---------------------------------------		
Posted through http://www.FPGARelated.com

On Oct 9, 5:44=A0am, "pfaisalbe" <pfaisalbe@n_o_s_p_a_m.gmail.com>
wrote:
> Hi
>
> I am using Xilinx Sapartan 3 . I have wrote HDL in verilog for testing an
> external memory attached to FPGA. Mapping end up with error.
>
> Pack:2309 -Toomanybondedcompsof type "IOB" found to fit this device.
>
> I am a beginner in this field. In the first place , It seems that I am
> using more resources than the FPGA can provide ? .
>
> Please suggest , =A0how to get rid of this error
>
> Thanks and Regards
>
> Faisal
>
> --------------------------------------- =A0 =A0 =A0 =A0
> Posted throughhttp://www.FPGARelated.com

This just started happening to an existing design that I migrated from
ISE 11.5 to 12.3.  No idea why, as the floorplan is nowhere near
full.  You might try building your project under ISE 11.

-- john, KE5FX