Problems connecting with Xilinx Spartan-6 FPGA

Currently, when trying to download the bitstream to this SP605 board, I get the following error: FPGA configuration encountered errors. Program FPGA failed ERROR: Connection to Board Failed Failed to Open JTAG Cable Check the following: 1. Cable is Connected to the Board and the Board is Powered-ON 2. On Cable Lock Error, Close the other application using the cable or Remove Cable Locks using "xclean_cablelock" command 3. You have specified the correct JTAG settings for cable type and port. So basically the SDK is not seeing the board. It's odd, because in my "Devices and Printers" window it does appear as "Silicon Labs CP210x USB to UART Bridge (COM3)". Currently it seems that my computer thinks this connection is a wired mouse. (That's the icon it's showing.) Earlier it was using the generic "unidentified device" icon, but it has been unplugged and reattached a couple times since then. I'm using SDK version 12.3 on a Windows 7 x64 version 6.1.7600 Build 7600. I tried following the instructions in the included "Getting Started" pamphlet to ensure the board was hooked up correctly, and basically when I got to the part where the Xilinx logo is supposed to appear onscreen I instead get large horizontal green and purple strips, overlaid with vertical lines in different shades of grey and black. I get the impression that either the board as a whole, or perhaps just the adapter piece for the monitor cable is broken. I am getting a solid green and a solid red "Error" LED in the upper- right corner of the board. Not sure if these mean anything. Any ideas as to how I can get this connected and running projects?

On Mar 23, 4:16=A0pm, DaMunky89 <shwankymu...@gmail.com> wrote: > Currently, when trying to download the bitstream to this SP605 board, > I get the following error: > > FPGA configuration encountered errors. > Program FPGA failed > =A0 =A0ERROR: Connection to Board Failed > Failed to Open JTAG Cable > =A0 =A0 Check the following: > =A0 =A0 1. Cable is Connected to the Board and the Board is Powered-ON > =A0 =A0 2. On Cable Lock Error, Close the other application using the > cable or Remove Cable Locks using "xclean_cablelock" command > =A0 =A0 3. You have specified the correct JTAG settings for cable type an= d > port. > > So basically the SDK is not seeing the board. It's odd, because in my > "Devices and Printers" window it does appear as "Silicon Labs CP210x > USB to UART Bridge (COM3)". Currently it seems that my computer thinks > this connection is a wired mouse. (That's the icon it's showing.) > Earlier it was using the generic "unidentified device" icon, but it > has been unplugged and reattached a couple times since then. > > I'm using SDK version 12.3 on a Windows 7 x64 version 6.1.7600 Build > 7600. > I tried following the instructions in the included "Getting Started" > pamphlet to ensure the board was hooked up correctly, and basically > when I got to the part where the Xilinx logo is supposed to appear > onscreen I instead get large horizontal green and purple strips, > overlaid with vertical lines in different shades of grey and black. I > get the impression that either the board as a whole, or perhaps just > the adapter piece for the monitor cable is broken. > > I am getting a solid green and a solid red "Error" LED in the upper- > right corner of the board. Not sure if these mean anything. Any ideas > as to how I can get this connected and running projects? The SP605 has two mini USB ports on it. One of them is a USB to serial port, and that appears to be what you have connected to if you see the Silicon Labs part. The other one is the USB to JTAG port. Try connecting to that one, and see if the "Failed to Open JTAG Cable" error message goes away. Regards, John McCaskill www.FasterTechnology.com

On Mar 23, 6:23=A0pm, John McCaskill <jhmccask...@gmail.com> wrote: > On Mar 23, 4:16=A0pm, DaMunky89 <shwankymu...@gmail.com> wrote: > > > > > Currently, when trying to download the bitstream to this SP605 board, > > I get the following error: > > > FPGA configuration encountered errors. > > Program FPGA failed > > =A0 =A0ERROR: Connection to Board Failed > > Failed to Open JTAG Cable > > =A0 =A0 Check the following: > > =A0 =A0 1. Cable is Connected to the Board and the Board is Powered-ON > > =A0 =A0 2. On Cable Lock Error, Close the other application using the > > cable or Remove Cable Locks using "xclean_cablelock" command > > =A0 =A0 3. You have specified the correct JTAG settings for cable type = and > > port. > > > So basically the SDK is not seeing the board. It's odd, because in my > > "Devices and Printers" window it does appear as "Silicon Labs CP210x > > USB to UART Bridge (COM3)". Currently it seems that my computer thinks > > this connection is a wired mouse. (That's the icon it's showing.) > > Earlier it was using the generic "unidentified device" icon, but it > > has been unplugged and reattached a couple times since then. > > > I'm using SDK version 12.3 on a Windows 7 x64 version 6.1.7600 Build > > 7600. > > I tried following the instructions in the included "Getting Started" > > pamphlet to ensure the board was hooked up correctly, and basically > > when I got to the part where the Xilinx logo is supposed to appear > > onscreen I instead get large horizontal green and purple strips, > > overlaid with vertical lines in different shades of grey and black. I > > get the impression that either the board as a whole, or perhaps just > > the adapter piece for the monitor cable is broken. > > > I am getting a solid green and a solid red "Error" LED in the upper- > > right corner of the board. Not sure if these mean anything. Any ideas > > as to how I can get this connected and running projects? > > The SP605 has two mini USB ports on it. One of them is a USB to serial > port, and that appears to be what you have connected to if you see the > Silicon Labs part. The other one is the USB to JTAG port. =A0Try > connecting to that one, and see if the "Failed to Open JTAG Cable" > error message goes away. > > Regards, > > John McCaskillwww.FasterTechnology.com Yeah, I tried that one, and I just got the "could not find drivers" error when Windows tried to set it up.

Similiar Articles:

Connect USB device to Spartan 3 FPGA - comp.arch.fpga
PROM for Spartan 6 FPGA - comp.arch.fpga Connect USB device to Spartan 3 FPGA ... for Spartan 6 FPGA - comp ... around a Xilinx Spartan-3E Field Programmable Gate Array ...

Spartan 3 DCM problem - comp.arch.fpga
In my experience, problems with DCMs often derive from noise on the ... Spartan 3 DCM problem - comp.arch.fpga | Computer Group xilinx spartan 6 deserialization - comp.arch ...

xilinx spartan 6 deserialization - comp.arch.fpga
Spartan-6 hold time problems (multipost to Xilinx forums) - comp ..... and does ... Regulator for Spartan 2 - comp.arch.fpga I got started with Xilinx on a project where I ...

Xilinx Flash PROM and Config rate for Spartan 6 FPGA - comp.arch ...
Hi All, I am using a Spartan-6 FPGA in my design (XC6SLX16 -2CSG225). I am using a XILINX ... PROM and Config rate for Spartan 6 FPGA - comp.arch ... Connect USB ...

Spartan-6 - What is the IODRP2_MCB?? - comp.arch.fpga
I was expecting to use NET1 to connect ... Spartan-6 hold time problems (multipost to Xilinx forums) - comp ... ... Spartan-6 FPGA family delivers an optimal ...

Xilinx Spartan 3, SelectMap, Mode pins, Dynamic Reconfiguration ...
... of course I will need to bring out signals from the FPGA to connect ... it for partial reconfiguration ... arch.fpga PROM for Spartan 6 FPGA - comp.arch.fpga Xilinx Spartan ...

Q.Timing Simulation using ModelSim for a Xilinx Spartan 2E - comp ...
When I go to Modelsim to do behavioral simulation. It says ... Cores generated output in Modelsim - comp.arch.fpga ... Spartan-6 hold time problems (multipost to Xilinx ...

Making hard macros in Xilinx FPGA Editor - comp.arch.fpga ...
... a question on Xilinx hard macros on this board, there's a lot of problems. ... How do you connect the ... Xilinx Flash PROM and Config rate for Spartan 6 FPGA - comp.arch ...

Using Xilinx DCM FX output without DLL - comp.arch.fpga
How to I connect the feedback clock input of the ... fpga DCM FX output without DLL - comp.arch.fpga Digital clock manager ... Xilinx Spartan 3 ... PS1: I am using Spartan 6 ...

Is Spartan 6 good for this project? - comp.arch.fpga
Xilinx ISE 7.1 - comp.arch.fpga Is Spartan 6 good for this project? - comp.arch.fpga Spartan-6 hold time problems (multipost to Xilinx forums) - comp ...

Problems connecting with Xilinx Spartan-6 FPGA - Xilinx User ...
Currently, when trying to download the bitstream to the SP605 board, I get the following error: FPGA configuration encountered errors. Program FPGA failed ...

Problems connecting with Xilinx Spartan-6 FPGA - EDAboard.com
Everyting about Problems connecting with Xilinx Spartan-6 FPGA Currently, when trying to download the bitstream to this SP605 board,I get the following

7/22/2012 2:32:47 PM