Hi Does anyone have some guidelines on how to implement a 4'th order low-pass Butterworth IIR filter in fixed point. My cut-off frequency is relatively close to the DC frequency so high precision is needed for the coefficients. What about realization structure and so on! I have implemented the bit-flipping algorithm in http://www.cmsa.wmin.ac.uk/~artur/pdf/Paper16.pdf for quantization of coefficients and it indeed works, but does some other techniques allow for further reductions of number of bits used to represent the coefficients. Thomas

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11/5/2003 11:43:23 PM

I've found the normalized lattice-ladder approach yields low distortion even at low frequencies. The cost is more multiplies per filter. Is this a hardware/FPGA implementation? "Heureka" <stoltzo@hotmail.com> wrote in message news:boc1up$l86$1@news.cybercity.dk... > Hi > > Does anyone have some guidelines on how to implement a 4'th order low-pass > Butterworth IIR filter in fixed point. My cut-off frequency is relatively > close to the DC frequency so high precision is needed for the coefficients. > What about realization structure and so on! > > I have implemented the bit-flipping algorithm in > http://www.cmsa.wmin.ac.uk/~artur/pdf/Paper16.pdf for quantization of > coefficients > and it indeed works, but does some other techniques allow for further > reductions of number of bits used to represent the coefficients. > > Thomas > >

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11/6/2003 12:13:00 AM

Might have to go with 32 bit filter states and/or coefficients. Or you can try some of the noise shaping that's been described in here every now and then. I would cascade 2, 2nd order biquads ( if it's being done in software ). Robert www.gldsp.com "Heureka" <stoltzo@hotmail.com> wrote: >Hi > >Does anyone have some guidelines on how to implement a 4'th order low-pass >Butterworth IIR filter in fixed point. My cut-off frequency is relatively >close to the DC frequency so high precision is needed for the coefficients. >What about realization structure and so on! > >I have implemented the bit-flipping algorithm in >http://www.cmsa.wmin.ac.uk/~artur/pdf/Paper16.pdf for quantization of >coefficients >and it indeed works, but does some other techniques allow for further >reductions of number of bits used to represent the coefficients. > >Thomas > ( modify address for return email ) www.numbersusa.com www.americanpatrol.com

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11/6/2003 4:31:00 AM

Heureka wrote: > Hi > > Does anyone have some guidelines on how to implement a 4'th order > low-pass Butterworth IIR filter in fixed point. My cut-off > frequency is relatively close to the DC frequency so high > precision is needed for the coefficients. What about realization > structure and so on! > > I have implemented the bit-flipping algorithm in > http://www.cmsa.wmin.ac.uk/~artur/pdf/Paper16.pdf for quantization > of coefficients > and it indeed works, but does some other techniques allow for > further reductions of number of bits used to represent the > coefficients. > > Thomas Which is your relative cut-off frequency Fc/Fs? How many real bits has your signal? How many bits do you need after the filter stage? Bernhard

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11/6/2003 7:01:21 AM

Hello: Basic Guidelines: Use 2 2nd order Direct Form I (two delay lines, to avoid overflow of internal filter states) cascaded sections. You most likely will need to halve the a1 coeficient in each stage (if it is greater than 1) and do two macs on that part of the calculation. For low fc/fs, you may need 32 bit recursive data paths. Matlab has tools to take general transfer functions B(z)/A(z) and restructure them to cascaded second order sections. Regards -S www.appliedsignalprocessing.com "Heureka" <stoltzo@hotmail.com> wrote in message news:boc1up$l86$1@news.cybercity.dk... > Hi > > Does anyone have some guidelines on how to implement a 4'th order low-pass > Butterworth IIR filter in fixed point. My cut-off frequency is relatively > close to the DC frequency so high precision is needed for the coefficients. > What about realization structure and so on! > > I have implemented the bit-flipping algorithm in > http://www.cmsa.wmin.ac.uk/~artur/pdf/Paper16.pdf for quantization of > coefficients > and it indeed works, but does some other techniques allow for further > reductions of number of bits used to represent the coefficients. > > Thomas > >

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11/6/2003 5:16:51 PM

Sorry for my late reply! The filters are to be implemented on a FPGA. The cutoff frequency is fs/64. When I convert the floating point coefficients linearly I have to use 30 bit in order to have a stop band attenuation at 70 dB. With the bit.flipiing algorithm I can get the bit number down to 20 bit. I need to use as few multiplications as possible, since power consumption is of the essence - but area is too. Can anyone recommend some nice litterature adressing this issue! Thomas "Bernhard Holzmayer" <holzmayer.bernhard@deadspam.com> wrote in message news:1097769.KRe6XMYa8L@holzmayer.ifr.rt... > Heureka wrote: > > > Hi > > > > Does anyone have some guidelines on how to implement a 4'th order > > low-pass Butterworth IIR filter in fixed point. My cut-off > > frequency is relatively close to the DC frequency so high > > precision is needed for the coefficients. What about realization > > structure and so on! > > > > I have implemented the bit-flipping algorithm in > > http://www.cmsa.wmin.ac.uk/~artur/pdf/Paper16.pdf for quantization > > of coefficients > > and it indeed works, but does some other techniques allow for > > further reductions of number of bits used to represent the > > coefficients. > > > > Thomas > > Which is your relative cut-off frequency Fc/Fs? > How many real bits has your signal? > How many bits do you need after the filter stage? > > Bernhard >

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11/6/2003 7:38:37 PM

FPGA with minimal multiplies? In that case, scratch my previous idea of the normalized Lattice-Ladder implementation. "Heureka" <stoltzo@hotmail.com> wrote in message news:3faaa32c$0$69926$edfadb0f@dread12.news.tele.dk... > Sorry for my late reply! > > The filters are to be implemented on a FPGA. The cutoff frequency is fs/64. > When I convert the floating point coefficients > linearly I have to use 30 bit in order to have a stop band attenuation at 70 > dB. With the bit.flipiing algorithm I can get the bit number down to 20 bit. > I need to use as few multiplications as possible, since power consumption is > of the essence - but area is too. > > Can anyone recommend some nice litterature adressing this issue! > > Thomas > > > "Bernhard Holzmayer" <holzmayer.bernhard@deadspam.com> wrote in message > news:1097769.KRe6XMYa8L@holzmayer.ifr.rt... > > Heureka wrote: > > > > > Hi > > > > > > Does anyone have some guidelines on how to implement a 4'th order > > > low-pass Butterworth IIR filter in fixed point. My cut-off > > > frequency is relatively close to the DC frequency so high > > > precision is needed for the coefficients. What about realization > > > structure and so on! > > > > > > I have implemented the bit-flipping algorithm in > > > http://www.cmsa.wmin.ac.uk/~artur/pdf/Paper16.pdf for quantization > > > of coefficients > > > and it indeed works, but does some other techniques allow for > > > further reductions of number of bits used to represent the > > > coefficients. > > > > > > Thomas > > > > Which is your relative cut-off frequency Fc/Fs? > > How many real bits has your signal? > > How many bits do you need after the filter stage? > > > > Bernhard > > > >

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11/7/2003 1:47:17 AM

Hi Thomas! You can also use Lattice Digital Wave filter sections to implement 1-st and 2-nd order allpass sections in cascade. From these allpass sections in cascade one can form a sum or difference dependent on how the filter should act (LP, HP etc.). The resulting filter require minimal number of multipliers and wordlength. Jon Harris wrote: > FPGA with minimal multiplies? In that case, scratch my previous idea of the > normalized Lattice-Ladder implementation. > > "Heureka" <stoltzo@hotmail.com> wrote in message > news:3faaa32c$0$69926$edfadb0f@dread12.news.tele.dk... > >>Sorry for my late reply! >> >>The filters are to be implemented on a FPGA. The cutoff frequency is > > fs/64. > >>When I convert the floating point coefficients >>linearly I have to use 30 bit in order to have a stop band attenuation at > > 70 > >>dB. With the bit.flipiing algorithm I can get the bit number down to 20 > > bit. > >>I need to use as few multiplications as possible, since power consumption > > is > >>of the essence - but area is too. >> >>Can anyone recommend some nice litterature adressing this issue! >> >>Thomas >> >> >>"Bernhard Holzmayer" <holzmayer.bernhard@deadspam.com> wrote in message >>news:1097769.KRe6XMYa8L@holzmayer.ifr.rt... >> >>>Heureka wrote: >>> >>> >>>>Hi >>>> >>>>Does anyone have some guidelines on how to implement a 4'th order >>>>low-pass Butterworth IIR filter in fixed point. My cut-off >>>>frequency is relatively close to the DC frequency so high >>>>precision is needed for the coefficients. What about realization >>>>structure and so on! >>>> >>>>I have implemented the bit-flipping algorithm in >>>>http://www.cmsa.wmin.ac.uk/~artur/pdf/Paper16.pdf for quantization >>>>of coefficients >>>>and it indeed works, but does some other techniques allow for >>>>further reductions of number of bits used to represent the >>>>coefficients. >>>> >>>>Thomas >>> >>>Which is your relative cut-off frequency Fc/Fs? >>>How many real bits has your signal? >>>How many bits do you need after the filter stage? >>> >>>Bernhard >>> >> >> > >

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11/7/2003 8:48:00 AM

Hi Does anyone have some guidelines on how to implement a 4'th order low-pass Butterworth IIR filter in fixed point. My cut-off frequency is relatively close to the DC frequency so high precision is needed for the coefficients. What about realization structure and so on! I have implemented the bit-flipping algorithm in http://www.cmsa.wmin.ac.uk/~artur/pdf/Paper16.pdf for quantization of coefficients and it indeed works, but does some other techniques allow for further reductions of number of bits used to represent the coefficients. Thomas I've found the normalized lattice-ladder...

Hello. I am a professional programmer, but I am doing DSP just as a hobby. Three years ago I designed a morse / PSK31 decoder on a 16bit no- multiplier controller. After rouhgly 3 years of absence in the DSP field I am back to design a HAM shortwave software defined radio using a beautiful new part from Texas Instruments - TLV320AIC3254 codec with miniDSP core. The part could do all the signal processing I need with just a 5x5mm board space including earphone driver. That's an engineer's dream come true. The goal is to downconvert a SSB voice channel down to audio with a quadrature m...

HI everyone, I was wondering if anyone can recommend me good books or papers on fixed-point IIR implementation strategies on FPGAs or CPUs. Especially regarding fc versus Fs and coefficient quantization. I have issues with an order-1 DC-removal filter with Fs = 100 MHz and Fcut = 250 kHz. Basically, I need lots of precision in the intermediate calculations which impact the number of bits for the multiplier and thus the maximum frequency of my FPGA design. Best regards On 11/14/2011 1:15 PM, Benjamin Couillard wrote: > HI everyone, > > I was wondering if anyone can recommend me good...

Hi pals, I would like to implement a IIR Biquad filter using the fixed point arithmetics... Hence to reduced the intermediate states I plan to use the following trick: s(k) = x(k) -a1*s(k-1) -a2*s(k-2) y(n) = b0*s(k) + b1*s(k-1) + b2*s(k-2) The I can compute each y, saving only 2 states (s(k-1) a�nd s(k-2))... BUT ... in order to scale my coefficients or input, I need to know what are the boundaries of the s(k) serie... in order to find a proper Fixed Point format for my coefficients.. So my questions are : * for which conditions, s(k) is bounded * If the s(k) is bounded, what are the b...

Hi I am trying to design a IIR filter using a 16-bit fixed point DSP. I nee to calculate the coeff in the form of second order sections. I would lik to do this with MATLAB. Does anyone have some MATLAB code that will d this. I found a routine on Texas Instrument site but as well as the coef it creates some scaling factors for the inputs. I dont want this as I hav seen other programs such as Filter Express that just give the Coeff. Thanks J This message was sent using the Comp.DSP web interface o www.DSPRelated.com OK. You have several kinds of IIR filter, for instance elliptic (the be...

Hello, I tried implementing a LPF biquad (that works perfectly in floating point) with: a = [1.00000, -1.90887, 0.91129], b = [6.1150e-04, 1.2230e-03, 6.1150e-04] in fixed point / integer, with 16 bit coefficients, 10 bit input signal and a 32 bit accumulator. I suspect the coefficient resolution is not enough. I tried: - the direct form 1 and direct form 2 transposed structures, but the output is zero if the input signal is not very high -- because of the small b coefficients, the signal is attenuated very much in the FIR portion of the filter and is lost; int biquad_ab(d, a0...

I would greatly appreciate some feedback/help on implementing a generic fix= ed-point IIR filter package. I am attempting to define a fixed-point type (Pressure_Type) that has a lim= ited range and precision. When doing things (like filtering) to values of = this type, intermediate calculations require a larger range and possibly hi= gher precision. But I don't want to expand the range/precision of the base= type -- rather define new types as appropriate for the required intermedia= te calculations. Below is my first attempt. I noticed the following issues: - I cannot def...

I have a fixed 3600 data points(samples) and I want to apply a notch 2nd order Butterworth IIR Notch filter to remove the 1/4Fs frequency, the results start to converge(or filter start to work) after about 250 or so samples. The issue is the it is a continuous stream of data and I need to remove the harmonics on the initial 250 samples. What can I do to filter the whole data set? thank you, Andrew ahgu <honestgold@n_o_s_p_a_m.gmail.com> wrote: > I have a fixed 3600 data points(samples) and I want to apply a notch 2nd > order Butterworth IIR Notch filter to re...

Let's say we need to implement H(z) = P(z)/Q(z) in the fixed point. The typical implementation would be a cascade of biquads. So we factor P(z) and Q(z) and distribute poles and zeroes between the stages. The dynamic range of a filter is limited by overflow at the top, and by quantization artifacts at the bottom. We can try all variants of assignment of poles and zeroes to different stages to maximize the dynamic range from rms quantization noise to full scale sine wave at the "worst" frequency. So far so good. However, this doesn't tell if some stage of f...

Hi I tried implementing a 2nd order High Pass filter in Fixed Point with cutoff of 20 kHz with a Sampling Frequency of Fs = 4MHz to remove D offsets. Despite quantizing the coefficients to 31 bits, when I supply DC signal, the values dont settle to zero. I used the butter function i Matlab to generate the coefficients and subsequently quantize it butter(2,1,20e3/4e6) It would be helpful if somebody could share their experience and tell m the right way to implement these filters. Incidentally, if there is small signal riding on the DC offset, then the signal settles to a leve whose mean ...

I have done an impulse response of an IIR filter. The impulse response of the filter does not return to zero but stops at a level close to zero (I think it�s because limitations in fraction bits). The filter is implemented in fixed point arithmetic�s. And when I make an FFT of the impulse response de 0 Hz gain is not 0 dB as I would like it to be. But when I run a step response I get almost perfect 0 Hz gain of 0 dB. So the problem is that the FFT of the impulse response says the gain is not 0 dB at 0 Hz but the step response says the gain is 0 dB at 0 Hz? What should I do? Not ...

Hi all, I want to implement an butterworth low pass filter to filter the DC compone= nt of a signal inside a PLL - phase locked loop. I am processing sample-by-= sample. Therefore I have to filter the signal sample by sample (Not the who= le signal or block by block). I have implemented a filter to filter the who= le signal. But Im struggling to modify it make it work sample by sample bas= is. I highly appreciate if someone can advice me regarding this issue. I have i= ncluded the code Im using to filter. [b,a] =3D butter(10, 4*fc/Fs); % 10th Order butterworth filter coefficie...

Hi, I have a floating point c code to implement a navigation system algorithm. In order to implement it in the 64x+ fixed point DSP processor, i need to have the code in fixed point. I learnt that there are few processor specific IQmath libraries aiding this purpose. Is it practical to write the code using these libraries or should i manually write codes for each operation by scaling the inputs for each line of the code, in which case i have to create look up table for the trigonometric functions etc which is a harder process to begin with.. Thanks, Divya On 2/13/12 11:38 AM, divya_di...

Hi folks, I was wondering if this is a truly valid method of going from a 1st Orde IIR lowpass transfer fucntion to a 2nd Order IIR lowpass transfer functio - 1st Order Transfer Function :- % 1 + z^-1 % H(z) = b ---------- % 1 - az^-1 To go to 2nd Order multiply the numerator and denominator - % 1 + z^-1 (1 + z^-1)(1 + z^-1) % H(z) = b ---------- = b -------------------- % 1 - az^-1 (1 - az^-1)(1 - az^-1) Which arrives at :- % 2nd Order Lowpass Transfer Function % % 1 + 2z^-1 + z^-2 % H(z) = b -----------...

I'm trying to make a tool that implements various types of IIR filters up t= o a certain maximum filter order (8 in my case). I've been learning about t= he bilinear transform and how to use it to turn an analog transfer function= into a something that can be implemented as a digital filter. I already have working implementations for 1-5th order butterworth low pass= filters, but I've noticed some issues with filter stability for filter ord= ers above 3 when the cutoff frequency is a small with respect to the sample= rate. Going to double precision helps a little bit bu...

Hi guys, I have a question: What is the best, shortest way to filter a fixed-point signal and get the spectra of input and output signals? I have the filter designed using fdatool and then used sfi to transform a sinusoidal signal into fixed-point. But I cannot import a fixed-point object to sptool and then filter it and get the spectra and etc. ...

Hi, i want to implement the equation p3 = p3*0.5/cos(3*PI/8); into 16bit processor, where p3 is a 16 bit value; any pointers as to how to go about it -vijay n_vijay_anand wrote: > Hi, > > i want to implement the equation > > p3 = p3*0.5/cos(3*PI/8); > > into 16bit processor, where p3 is a 16 bit value; > > any pointers as to how to go about it It looks like '0.5/cos(3*PI/8)' is a constant, so simplify it. cos(3*PI/8) = 0.99978861 0.5/0.99978861 = 0.50010571 Depending on the algorithm you might get away with simply dividing by 2: p3 >...

Hi, i have a problem with a filter that i have constructed using the fdatool. The Filter is a IIR Chebychev Bandstop with 8 sections. I have exported the Filter to my Simulink model where i generate Code from it with the RTW. I have a fixed point DSP(tms320f2812). Since the filter is generated with floating point values the generated code is very slow-> the floating point calculations are emulated by code. For a single Multiplication it takes some hundred CPU cycles. If I had a fixed point filter the calculations could be done much faster(in best case 6 cycles per multiplication). I have ...

hi, This is my first filter implementation and is made in Scilab, also the design of the 3ord Chebyshev Type I IIR Filter (with the iir function). I actually have 3 filters, so i can use them as an equalizer for an audio application. I´m using Direct Form I Realization. Since I have to implement this on a 24bit Fixed-Point DSP I had to scale my coefficients by a factor of 256 (same as shifting 8 bits). The problem that I've been having is that the output signal generated by the scilab script gets some attenuation but only with my coefficients scaled, without the scale factor I get 0 ...

I'm finally about ready to release an IIR filter design program called - you guessed it - ScopeIIR (TM). It currently supports the basic design types of Butterworth, Chebyshev, and Elliptic. I'm trying to finalize the default and maximum IIR filter order that the program will support. To help me do that, please tell me about your experiences with IIR filter order, assuming the above types and implementation via biquads, where applicable: - Minimum order: (I assume 1) - The typical order you use for most problems - The maximum order you've ever used in a real sys...

Hello Guys! I have a brief signal, about 100 values, having unknown frequenc components including a single frequency of interest to me. I have designe an IIR filter using MATLAB that will filter out the single frequency. However, since the signal is brief, I face the problem that the filter ha a non-zero transient response while handling most of my signal. This cause weird results. Will it help if I pass a long sinusoid of the passband frequency befor passing my signal? Is this a good way of preventing the transient respons from affecting the filtering? Thanks a million! --- Par. Thi...

Hi: Can anyone help me to understand why CIC filter can not be implemented i floating point? Mr. Dirk A Bell mentioned: >>A CIC filter cannot be implemented in floating point. To get it to >>work it must be done in non-saturating integer math, such as is done >>using non-saturating two's complement representation. The integer >>math must wrap around. >> >>Dirk A. Bell in http://www.dsprelated.com/showmessage/4544/1.php Could anyone explain it in more details or refer some articles to read? Thanks for the help in advance. Jing sunflowerhj wrote: &...

hi people, I'm designing filter system called IIR filter on the FPGA kit, but it doesn't work when I implement on FPGA. When i iput the signals, the output results seem to not get any thing. I do not know whether my source code is wrong or another reason. The FPGA kit operate normally with other sources which i loaded in the past. Can anyone give me some advices to test what parts in my project do not work or give me some idea to test anything. I am in the mess. I hope everyone can show me. I am looking forward hearing from people soon, Gordon Freeman wrote: > hi people, > ...

Help!! I am going crazy trying to scale a 4 section SOS (second order section) IIR filter (normalised) in a [16 15] qfilt object. I am reduced to scaling by guestimate but I just cannot stop arithmetic overflow/underflow. I just wondered if their was a magic formula, rule of thumb, handy trick that would help to precisely scale each section. Any suggestions gratefully received. Charles wrote: > > > Help!! > > I am going crazy trying to scale a 4 section SOS (second order > section) IIR filter (normalised) in a [16 15] qfilt object. > > I am reduced to scaling by gu...

What�s the best way to determine the required number of bits necessary in a fixed-point IIR-filter? To avoid overflow during calculations. "Elektro" <blabla@bredband.net> wrote in news:4293a2ac$0$79465$14726298@news.sunsite.dk: > What�s the best way to determine the required number of bits necessary > in a fixed-point IIR-filter? To avoid overflow during calculations. > > > The number of bits needed in an IIR filter depends on many factors including the coefficients of the filter, the desired performance of the filter and the implementation of the filt...