f

#### simple clipping to +-(2^n) or +-(2^n-1)?

```Hi all,

I searched the web and didn't find anything useful,
but is there some trick to clip a signed int to, say,
+-15 or +-16, maybe using some bit pattern processing?

Best regards,

Andre
```
 0
Andre
1/14/2015 2:33:21 PM
comp.dsp 20333 articles. 1 followers. allnor (8509) is leader.

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```On Wed, 14 Jan 2015 15:33:21 +0100, Andre <lodwig@pathme.de> wrote:

>Hi all,
>
>I searched the web and didn't find anything useful,
>but is there some trick to clip a signed int to, say,
>+-15 or +-16, maybe using some bit pattern processing?
>
>Best regards,
>
>Andre

if (x(n) > UpperLimit) x(n) = UpperLimit;

if (x(n) < LowerLimit) x(n) = LowerLimit;

Eric Jacobsen
Anchor Hill Communications
http://www.anchorhill.com
```
 0
eric
1/14/2015 6:27:39 PM
```On 14.01.15 15.33, Andre wrote:
> I searched the web and didn't find anything useful,
> but is there some trick to clip a signed int to, say,
> +-15 or +-16, maybe using some bit pattern processing?

+-15 or +-16 is an odd range. You won't get this working by bit operations.
And even other saturation logic is not that trivial. That's why GPUs
have hard coded hardware for this purpose.

The fastest way without dedicated hardware is compare followed by
conditional memory access if your CPU supports it. There you might
succeed with 4 machine instructions. Without conditional memory access
(e.g. x86) you won't come around branches with probably not that good
branch prediction.

Of course, you can use bit logic, but I am in doubt that there is any
benefit, besides obfuscation of course.

short x, y;
x = y = i;
x |= x << 6; y &= y << 6;
x |= x << 3; y &= y << 3;
x |= x << 1; y &= y << 1;
x |= x << 1; y &= y << 1;
x &= ~y;     y = i;
x >>= 15;    y >>= 15;
printf(" - %x, %x, %x; %x - ", x, y, x & ~y & 15);
i |= x & ((y & -16) | (~y & 15));
i &= ~x | ((y | 15) & (~y | -16));

Now i is restricted to -16..15. This is for 16 bit input. But it works
similar for 32 bit input. You only need another shift operation above.

Marcel
```
 0
Marcel
1/14/2015 7:04:42 PM
```On Wed, 14 Jan 2015 15:33:21 +0100, Andre wrote:

> Hi all,
>
> I searched the web and didn't find anything useful, but is there some
> trick to clip a signed int to, say, +-15 or +-16, maybe using some bit
> pattern processing?

In what hardware?

What are you really trying to do?

There are some handy tricks you can do if n is equal to one less than your
word width, the number is a result of an add or subtract (so there's an
overflow bit available) and you're willing to program in assembly language.

There are some handy tricks you can do if n is equal to one less than your
word width and you're using an integer DSP with an overflow register (they
come with different names, but yea -- that).

There are some handy tricks you can do if you're doing FPGA or logic
design and the number is the result of an add (or a series thereof).

All these sets of handy tricks are different.

--

Tim Wescott
Wescott Design Services
http://www.wescottdesign.com
```
 0
Tim
1/14/2015 11:16:54 PM
```For FPGAs you can either check the whole value or better just the few MSB
bits to be ddiscarded as follows:

-- checking one MSB bit and clipping, assuming data1 is 17 bits signed
if  data1(16:15) = “00” or  data1(16:15) = “11” then
data  <= data1(15 downto 0);
elsif  data1(16) = '1' then
data  <= -32767;
else
data  <= +32767;
end if;

Kaz

_____________________________
Posted through www.DSPRelated.com
```
 0
kaz
1/14/2015 11:43:06 PM
```Andre <lodwig@pathme.de> wrote:

> I searched the web and didn't find anything useful,
> but is there some trick to clip a signed int to, say,
> +-15 or +-16, maybe using some bit pattern processing?

If you want saturation arithmetic, so clip and the largest
and smallest values, sense overflow/underflow (assuming add
or subtract) and process accordingly.

Some years ago, I was trying to do this in XC4000 series
FPGAs, which have a neat trick. I don't think this works
in later ones.

The XC4000 carry logic is separate from the logic generating
the sum (or difference). Also, there is one extra entry in
the LUTs that are needed for adding.  I could test for overflow
or underflow (not both) and feed the resulting signal into the
otherwise unused LUT input to generate the largest or smallest
value.  (In most cases I knew which way it would go.)

In the case where it could either overflow or underflow, I would
feed one signal to the following pipeline stage, which also had
an extra input.

That trick went away with the XC4000, and I don't know any quite
as good for later series.

For software, again detect the overflow and use conditional load
(faster than unpredicted branch) to load the right value. Again,
you have to know which way it goes, or use two such tests.

For other cases, you can use bit masks to detect values.
That is sometimes faster than compare instructions.

-- glen

```
 0
glen
1/15/2015 1:46:33 AM
```Dear all,

thanks for all the responses, I was just a bit upset that comparing to
upper and lower limit is my best option.

Hardware is a blackfin DSP, I noticed that a sharc has
a native clip instruction...

best regards,

Andre

On 15.01.2015 00:43, kaz wrote:
> For FPGAs you can either check the whole value or better just the few MSB
> bits to be ddiscarded as follows:
>
> -- checking one MSB bit and clipping, assuming data1 is 17 bits signed
> if  data1(16:15) = “00” or  data1(16:15) = “11” then
>        data  <= data1(15 downto 0);
> elsif  data1(16) = '1' then
>        data  <= -32767;
> else
>        data  <= +32767;
> end if;
>
>
> Kaz
>
> _____________________________
> Posted through www.DSPRelated.com
>

```
 0
Andre
1/15/2015 8:51:51 AM
```On 15.01.2015 00:43, kaz wrote:
> For FPGAs you can either check the whole value or better just the few MSB
> bits to be ddiscarded as follows:
>
> -- checking one MSB bit and clipping, assuming data1 is 17 bits signed
> if  data1(16:15) = “00” or  data1(16:15) = “11” then
>        data  <= data1(15 downto 0);
> elsif  data1(16) = '1' then
>        data  <= -32767;
> else
>        data  <= +32767;
> end if;
>
>
> Kaz
>
> _____________________________
> Posted through www.DSPRelated.com
>

Dear all,

thanks for all the responses, I was just a bit upset that comparing to
upper and lower limit is my best option.

Hardware is a blackfin DSP, I noticed that a sharc has
a native clip instruction...

best regards,

Andre

```
 0
Andre
1/15/2015 8:52:11 AM
```On 01/15/2015 04:52 PM, Andre wrote:
> On 15.01.2015 00:43, kaz wrote:
>> For FPGAs you can either check the whole value or better just the few MSB
>> bits to be ddiscarded as follows:
>>
>> -- checking one MSB bit and clipping, assuming data1 is 17 bits signed
>> if  data1(16:15) = “00” or  data1(16:15) = “11” then
>>         data  <= data1(15 downto 0);
>> elsif  data1(16) = '1' then
>>         data  <= -32767;
>> else
>>         data  <= +32767;
>> end if;
>>
>>
>> Kaz
>>
>> _____________________________
>> Posted through www.DSPRelated.com
>>
>
> Dear all,
>
> thanks for all the responses, I was just a bit upset that comparing to
> upper and lower limit is my best option.
>
> Hardware is a blackfin DSP, I noticed that a sharc has
> a native clip instruction...
>
> best regards,
>
> Andre
>
Are you sure there isn't an option to saturate to any selected bit
position in a Blackfin? Its years since I touched one, but I thought it

Regards,
Steve

```
 0
Steve
1/15/2015 2:11:01 PM
```On Thu, 15 Jan 2015 09:52:11 +0100, Andre <lodwig@pathme.de> wrote:

>On 15.01.2015 00:43, kaz wrote:
>> For FPGAs you can either check the whole value or better just the few MSB
>> bits to be ddiscarded as follows:
>>
>> -- checking one MSB bit and clipping, assuming data1 is 17 bits signed
>> if  data1(16:15) = “00” or  data1(16:15) = “11” then
>>        data  <= data1(15 downto 0);
>> elsif  data1(16) = '1' then
>>        data  <= -32767;
>> else
>>        data  <= +32767;
>> end if;
>>
>>
>> Kaz
>>
>> _____________________________
>> Posted through www.DSPRelated.com
>>
>
>Dear all,
>
>thanks for all the responses, I was just a bit upset that comparing to
>upper and lower limit is my best option.
>
>Hardware is a blackfin DSP, I noticed that a sharc has
>a native clip instruction...

It is probably an asymetric 2's complement clip, which most are.  If
you want an symmetric clip like you previously described, you pretty
much have to compare, although the "compare" can take different tricky
forms depending on what you're doing..

>best regards,
>
>Andre
>

Eric Jacobsen
Anchor Hill Communications
http://www.anchorhill.com
```
 0
eric
1/15/2015 4:51:20 PM
```On Wednesday, 14 January 2015 09:33:25 UTC-5, Andre  wrote:
> Hi all,
>
> I searched the web and didn't find anything useful,
> but is there some trick to clip a signed int to, say,
> +-15 or +-16, maybe using some bit pattern processing?
>
> Best regards,
>
> Andre

What range are your numbers in?  If you are using 16 bits integers why not just a table-lookup?  Than your code becomes:

```
 0
earl_colby_pottinger
1/15/2015 5:18:25 PM
```Andre wrote:
> thanks for all the responses, I was just a bit upset that comparing to
> upper and lower limit is my best option.
>
> Hardware is a blackfin DSP, I noticed that a sharc has
> a native clip instruction...

Blackfin has a saturating shift, so if you actually want to clip to
[-16,+15] ("2's complement, 5 bits"), you could do things like
r0 = r0 << 26 (s);
r0 = r0 >>> 26;

Blackfin also has MIN and MAX that make clipping to any interval trivial
if you have some registers to spare.

Stefan

```
 0
Stefan
1/15/2015 5:43:58 PM
```>On Thu, 15 Jan 2015 09:52:11 +0100, Andre <lodwig@pathme.de> wrote:
>
>>On 15.01.2015 00:43, kaz wrote:
>>> For FPGAs you can either check the whole value or better just the few
MSB
>>> bits to be ddiscarded as follows:
>>>
>>> -- checking one MSB bit and clipping, assuming data1 is 17 bits signed
>>> if  data1(16:15) = “00” or  data1(16:15) = “11” then
>>>        data  <= data1(15 downto 0);
>>> elsif  data1(16) = '1' then
>>>        data  <= -32767;
>>> else
>>>        data  <= +32767;
>>> end if;
>>>
>>>
>>> Kaz
>>>
>>> _____________________________
>>> Posted through www.DSPRelated.com
>>>
>>
>>Dear all,
>>
>>thanks for all the responses, I was just a bit upset that comparing to
>>upper and lower limit is my best option.
>>
>>Hardware is a blackfin DSP, I noticed that a sharc has
>>a native clip instruction...
>
>It is probably an asymetric 2's complement clip, which most are.  If
>you want an symmetric clip like you previously described, you pretty
>much have to compare, although the "compare" can take different tricky
>forms depending on what you're doing..
>
>>best regards,
>>
>>Andre
>>
>
>Eric Jacobsen
>Anchor Hill Communications
>http://www.anchorhill.com
>

yes symmetric clipping requires check on full value and so may waste
resource.
asymmetric is easier and my above example is "almost symmetric" except for
value of -32768 which will pass through but that will very occasional and
trivial.

Kaz

_____________________________
Posted through www.DSPRelated.com
```
 0
kaz
1/15/2015 6:05:07 PM
```On Wednesday, January 14, 2015 at 6:43:09 PM UTC-5, kaz wrote:
> For FPGAs you can either check the whole value or better just the few MSB
> bits to be ddiscarded as follows:
>
> -- checking one MSB bit and clipping, assuming data1 is 17 bits signed
> if  data1(16:15) = "00" or  data1(16:15) = "11" then
>        data  <= data1(15 downto 0);
> elsif  data1(16) = '1' then
>        data  <= -32767;
> else
>        data  <= +32767;
> end if;
>
>
> Kaz
>
> _____________________________
> Posted through www.DSPRelated.com

Shouldn't "assuming data is 17 bits signed" also include that it has not overflowed yet?
```
 0
bellda2005
1/17/2015 8:07:51 PM
```>On Wednesday, January 14, 2015 at 6:43:09 PM UTC-5, kaz wrote:
>> For FPGAs you can either check the whole value or better just the few
MSB
>> bits to be ddiscarded as follows:
>>
>> -- checking one MSB bit and clipping, assuming data1 is 17 bits signed
>> if  data1(16:15) = "00" or  data1(16:15) = "11" then
>>        data  <= data1(15 downto 0);
>> elsif  data1(16) = '1' then
>>        data  <= -32767;
>> else
>>        data  <= +32767;
>> end if;
>>
>>
>> Kaz
>>
>> _____________________________
>> Posted through www.DSPRelated.com
>
>Shouldn't "assuming data is 17 bits signed" also include that it has not
overflowed yet?
>

A final result will be a number of bits(32,32,30,...18,17...)  and any
discarded msb need be checked and that implies no overflow.

Kaz

_____________________________
Posted through www.DSPRelated.com
```
 0
kaz
1/17/2015 8:38:40 PM

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