Hi everyone!
I have an unsigned long long int (64bit) mac_category which is set to 0.
Now I have to set the i-th bit of mac_category to 1 (0<i<63). How to do
that using inline-assembly of linux gcc ?
for example, set the 59th bit of mac_category to 1:
....
....
int i=59;
unsigned long long int mac_category = 0; // 64bit
/* I have to use AT&T format assembly for gcc */
asm (
/* define a 64bit-long variable mydq and set it to zero */
"mydq DQ, 0;"
/*
* do the shifting, %1 stands for the input operand,
* which is i in the c program;
*/
"shl %1, mydq;"
/*
* copy the value of mydq to %0, the output operand,
* which is mac_category in the c program;
*/
"mov mydq, %0;"
/* define the input and output operand */
:"=r"(mac_category)
:"r"(i)
);
....
....
the above inline assembly code does NOT work, I don't know why.
(It seems that you cannot define any variables in inline-assembly of
linux programs, right?)
How to solve this problem, please help me!
Thank you!
X.H.
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Hao
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7/6/2004 3:02:40 AM |
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"Hao Xu" <spamtrap@crayne.org> wrote in message
news:ccd16u$1vkq$1@mail.cn99.com...
> Hi everyone!
>
>
> I have an unsigned long long int (64bit) mac_category which is set to 0.
> Now I have to set the i-th bit of mac_category to 1 (0<i<63). How to do
> that using inline-assembly of linux gcc ?
>
> for example, set the 59th bit of mac_category to 1:
<snip>
First off, the assembly code you posted was not AT&T. It was masm assembly.
Second off, you can't define variables in the middle of your code in any
assembler -- the variable will be executed as code! Third, shl does not work
how you think it does.
Try this:
asm("shll %%cl, %0\n"
"cmpl $32, %%cl\n"
"cmovll %0, %1\n"
"xorl %1, %0\n"
"orl %0, %%edx\n"
"orl %1, %%eax"
: "A" (mac_category)
: "r" (1), "r" (0), "c" (i));
I don't recall whether or not the first parameter becomes %0 even though
it's not gcc-allocated, so you may have to change %0 -> %1 and %1 -> %2.
-Matt
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Matt
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7/6/2004 4:05:04 AM
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Hao Xu wrote:
> I have an unsigned long long int (64bit) mac_category which is set to 0.
> Now I have to set the i-th bit of mac_category to 1 (0<i<63). How to do
> that using inline-assembly of linux gcc ?
>
> for example, set the 59th bit of mac_category to 1:
>
> ...
> ...
>
> int i=59;
> unsigned long long int mac_category = 0; // 64bit
Why use assembly when C works fine?
#include <stdio.h>
int i = 59;
int main()
{
unsigned long long int mac_category = 1ULL << i;
printf("mac_category=%#llx\n", mac_category);
return 0;
}
$ gcc -std=c99 -Wall -pedantic -O3 -S test.c
main:
pushl %ebp
movl %esp, %ebp
subl $8, %esp
movl i, %ecx
movl $1, %eax
xorl %edx, %edx
shldl %eax, %edx
andl $-16, %esp
sall %cl, %eax
andl $32, %ecx
je .L2
movl %eax, %edx
xorl %eax, %eax
..L2:
pushl %ecx
pushl %edx
pushl %eax
pushl $.LC0
call printf
xorl %eax, %eax
leave
ret
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Grumble
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7/6/2004 5:34:23 PM
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Hao Xu asked:
[about BIT-SET]
| for example, set the 59th bit of mac_category to 1:
I don't know AT&T syntax, but this (IA-docs form)
b8 3b 00 00 00 MOV eax,3Bh ;dec 59
0f ab 05 mm mm mm mm BTS [memptr],EAX ;first test, then set bit
... ;carry-flag is previous bit-state
seems to be what you're searching for.
Even this isn't documented that way, it works for bit-offsets
in the range +-2^31 (if not out of limits) on my AMD K7 and on Celeron.
__
wolfgang
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wolfgang
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7/7/2004 4:04:46 PM
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"wolfgang kern" <nowhere@nevernet.at> wrote in message
news:cch6gn$j42$1@newsreader1.utanet.at...
>
> Hao Xu asked:
>
> [about BIT-SET]
> | for example, set the 59th bit of mac_category to 1:
>
> I don't know AT&T syntax, but this (IA-docs form)
>
> b8 3b 00 00 00 MOV eax,3Bh ;dec 59
> 0f ab 05 mm mm mm mm BTS [memptr],EAX ;first test, then set bit
> ... ;carry-flag is previous
bit-state
>
> seems to be what you're searching for.
>
> Even this isn't documented that way, it works for bit-offsets
> in the range +-2^31 (if not out of limits) on my AMD K7 and on Celeron.
This behavior is documented. However, it's slow -- 9 cycles on K7.
-Matt
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Matt
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7/7/2004 10:54:26 PM
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Hi Matt,
[about BIT-SET]
| > Even this isn't documented that way, it works for bit-offsets
| > in the range +-2^31 (if not out of limits) on my AMD K7 and on Celeron.
|
| This behavior is documented. However, it's slow -- 9 cycles on K7.
Must have missed this documentation, I saw only the 32-bit limits yet.
Nine cycles are somehow faster than the code Hao Xu's posted ;)
Yes, it can be done faster with (shifted) indexed offset and OR also,
with a few bytes more and one more register involved.
__
wolfgang
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wolfgang
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7/7/2004 11:51:28 PM
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Oh, for reference, CC, I don't wan't my address spamtrapped.
(I also don't want date that my system put in the headers when
I first shoved this message into the outside world overwritten.)
"Matt Taylor" <spamtrap@crayne.org> writes:
> > b8 3b 00 00 00 MOV eax,3Bh ;dec 59
> > 0f ab 05 mm mm mm mm BTS [memptr],EAX ;first test, then set bit
> > ... ;carry-flag is previous
> bit-state
Some needs to fix their word-wrap behaviour (OE Quotefix?)
> >
> > seems to be what you're searching for.
> >
> > Even this isn't documented that way, it works for bit-offsets
> > in the range +-2^31 (if not out of limits) on my AMD K7 and on Celeron.
>
> This behavior is documented. However, it's slow -- 9 cycles on K7.
As long as the result of the test part of the operation are not used
then surely this 9 cycles will be effectively almost cost free on an
aggressively OOO processor? Basically just invoke the write and forget
about it?
Phil
--
1st bug in MS win2k source code found after 20 minutes: scanline.cpp
2nd and 3rd bug found after 10 more minutes: gethost.c
Both non-exploitable. (The 2nd/3rd ones might be, depending on the CRTL)
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Phil
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7/8/2004 10:01:29 AM
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On Thu, 8 Jul 2004 10:01:29 +0000 (UTC)
Phil Carmody <spamtrap@crayne.org> wrote:
:Oh, for reference, CC, I don't wan't my address spamtrapped.
:(I also don't want date that my system put in the headers when
:I first shoved this message into the outside world overwritten.)
I have added "thefatphil_demunged@yahoo.co.uk" to the no spamtrap list,
but, unfortunately, I don't know how to fix the posting date problem.
-- Chuck
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Charles
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7/8/2004 6:50:10 PM
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7 Replies
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