I review VTune Reference that Pentium 4 has a lot of latency.  How do
you know that Intel promises to fix latency problem?
    For example, SHL/SHR can't be used, but use 3 adds instead.  How can 3
adds be done?  Suppose, 20H is in low byte that needs to be moved to high
byte by using shl eax, 08H.  Will lea be the option, but I don't think so.
shl eax, 08H is the same as imul eax, 0FFH, but both of them have latency on
Pentium 4.
    Please let me know if there is another way to avoid latency by writing
clever code without using shl?  Please advise.

-- 
Bryan Parkoff

Bryan,

If you need to do bit shifts and cannot substitute the operation with
up to 3 adds, you are stuck with a slow operation as the PIV performs
badly there. With a bit of fiddling, you can schedule instructions
before and after it at times that helps to hide the lag but if you can
find another way to do it, it would be a better solution.

LEA is off the pace as well but not as bad as bits shifts.

Regards,

hutch at movsd dot com