Frequency detection 0 926 (4/26/2011 6:57:41 PM)
Hello group, I'm new to verilog, so please bear with me. For couple days now, I’m trying to implement this simple freq detection on MAXII cpld for my diy audio dac, and by now I’m quite frustrated. Thing is, I...
temo_aldorado (1)

Using mopdorts within modports 1 178 (3/26/2011 8:28:53 PM)
I have a simple 2-signal hand-shake interface like this: interface ready_valid_ifc(input clk); wire ready; wire valid; modport sender(input clk,ready, output valid); modport receiver(input clk,valid,...
Puneet

Calling all Executive MBA Aspirants! Listen to experts@ Executive MBA Conference (Mar 26th,Blore) 0 125 (3/25/2011 4:21:36 AM)
Hello, Are you an IT professional looking to improve your leadership skills? Want to stay ahead in this competitive environment and lead with passion? In today=92s IT scenario, technical skills need to ...
Akram

Successive approximation ADC 1 382 (3/19/2011 9:57:30 AM)
i need guidance on designing a successive approximation adc please help ...
rohitvyasbadguy (1)

ERROR: Reference to vector reg 'InKbWd' is not a legal net lvalue 5 685 (3/17/2011 9:52:50 PM)
Hello: I am trying to implement a PS2 keyboard read routine. Basically, use the keyboard clock to shift 11 bits through a register. I am getting an odd error. Heres a SMALL snippet that shows the error...
Aldorus

`ifdef inside a macro 1 848 (3/18/2011 11:47:20 AM)
Is the macro expansion of the following code defined in SystemVerilog and if so, what is the expected macro expansion? `define TEST(x,y) \ `ifdef TEST_STUFF \ x <= y + 42; \ `else \ ...
Andreas

include file problem in verilog plz sort it out ..................... 1 370 (3/2/2011 6:30:24 AM)
hi all please check "module mian(a,b,c); //parameter A_width=4; //parameter D_width=8; `include "C:\Documents and Settings\abc\Desktop\prectice \info.h" input [A_width-1:0]a; input [D_width-1:...
m2star

crack required 0 156 (3/2/2011 2:15:31 PM)
hi all can anyone please upload that crack for modelsim 6.2b SE .................. ...
m2star (1)

Clarification required to do my Project 3 170 (2/24/2011 11:10:31 AM)
Hi everyone, I am trying to implement a pattern matching algorithm for Intrusion Detection system in FPGA's .The algorithm i ve developed has lesser number of iterations compared to the existing algo...
Pandiarajan