fastest complex division algorithm286 (9/24/2012 6:52:32 PM) Hi,
I am looking for the fastest complex division algorithm available. It coul=
d be a white paper, a core that is being sold or any other information that=
could help me research different options. I will... amishrughoonundon(5)
Multi Valued logic simulation using VHDL?1181 (2/20/2004 6:43:11 PM) Hi! I have taken on a project of benchmarking the relative performance of a binary ALU Vs a ternary ALU. I was wondering if I could use VHDL to program a simple ALU that does multiplication, addition and divis... amguru
change variable in case statement #2955 (9/11/2012 5:57:33 PM) Hello,
I have a problem with logic of case statement in vhdl. I wonder is the variable that selects the case condition can be changed within the statement. To clarify:
variable aaa: std... lessismore579(2)
negative slack262 (9/12/2012 5:34:57 AM) hello everyone
When I synthesize my code using synplify I got a slack of -40.508 on a ins=
tance of type DFN, pin Q and its arrival time is 1.395.
how can i reduce that slack please help.
where should I mo... sagar0205(6)