Reading/writing data to/from files into 2D array

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Hi:

I need to verify my design by comparing the VHDL simulation results
with actual results.I'm working with images and so,the input data is a
text file obtained from Matlab.The text file has image data (of image
size ... 256x256).I tried to read the data from the file into a 2D
array. The data has to be in the form of a matrix (2D array),as I need
to perform block processing later. Below is the code I'm working on.I
would highly appreciate any help/suggestions in doing this.

library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use IEEE.std_logic_unsigned.all;
use IEEE.numeric_std.all;
use work.data.all;

entity PE  is
    
  port (search_data1_in  : in data_array;
	current_data1_in : in data_array;
        clk,reset 	:  in std_logic;
        SAD_blk 	: out std_logic_vector(11 downto 0)
        );
end PE ;

architecture BEHAVE of PE is

signal search_data_in,search_data1_in1 	: 	data_array;
signal current_data1_in1,current_data_in: 	data_array;
signal s_ras,s_cas,c_ras,c_cas 		:	 std_logic;
signal s_row,s_col,c_row,c_col 	 	: 	integer;
signal s_address,c_address 		: 	std_logic_vector(15 downto 0);

type integer_file is file of integer;
file data_in  : integer_file is in "data.txt";

component S_DRAM
	port(s_address 		:	in std_logic_vector(15 downto 0);
	     clk,reset 		: 	in std_logic;
	     s_we	 	: 	in std_logic;
       	     s_ras,s_cas 	: 	in std_logic;
	     s_row,s_col	: 	out integer;
	     search_data_in	:	in data_array;
	     search_data_out	:	out data_array
		);
end component;

begin

  DRAM_S : S_DRAM port map(s_address => s_address, clk => clk, reset
=> reset, s_we => s_we, s_ras => s_ras, s_cas => s_cas, s_row =>
s_row, s_col => s_col, search_data_in => search_data_in,
search_data_out => search_data1_in1);
	
process 
  type Y_array is array (1 to 2,1 to 2) of integer;
  variable Y : Y_array;
  begin
    while not endfile (data_in) loop	
	for i in 1 to 2 loop
	   for j in 1 to 2 loop
	       read(data_in,Y(i,j));
           end loop;
	end loop;
    end loop;
  wait for 2 ns;
end process;

end behave;

Also,I need divide this 256x256 matrix into 4x4 blocks.I'm not
sure,where to start on this.Please give me some ideas to implement
this.

Thanks a lot,
Modukuri
0
Reply smodukuri 5/19/2004 4:03:43 PM


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