Hello,
The KPCR structure is obviously a per-processor structure that
contains the IRQL, the current processor number etc., and is addressed
by FS:0 (AMD64: GS:0?) segment register.
Moreover, I have seen that multi-core systems have one IDT (interrupt
descriptor table) per processor.
Questions:
* Is the (numerical) FS register content the same over different
processors?
* Is the FS selector base the /same/ over different processors, and
differences are resolved via different page table entries (i.e.
different CR3 values), or are differences resolved via different
selector bases (i.e. the GDT's are different)?
* Are the interrupt descriptor tables on same or different linear
addresses, i.e. does IDTR contain same or different values over
different processors?

Thank you for helpful answers.

henni <henrikhaftmann@googlemail.com> wrote:
>
>The KPCR structure is obviously a per-processor structure that
>contains the IRQL, the current processor number etc., and is addressed
>by FS:0 (AMD64: GS:0?) segment register.
>Moreover, I have seen that multi-core systems have one IDT (interrupt
>descriptor table) per processor.
>Questions:
>* Is the (numerical) FS register content the same over different
>processors?

Not sure I understand the question.  In all NT-derived systems, FS has the
value 0x003B.  The base address changes by processor.  On my Core 2 Duo,
it's either 7FFDD000 ir 7FFDF000.

>* Is the FS selector base the /same/ over different processors, and
>differences are resolved via different page table entries (i.e.
>different CR3 values), or are differences resolved via different
>selector bases (i.e. the GDT's are different)?

Different selector bases.

>* Are the interrupt descriptor tables on same or different linear
>addresses, i.e. does IDTR contain same or different values over
>different processors?

IDTR is different for different processors.

You can check all of this yourself.  You can use SetThreadAffinity to force
yourself into particular processors, then you can use this to read the
registers:
    unsigned short myfs;
    __asm mov [myfs], fs
    unsigned char idt[6];
    __asm sidt [idt]
-- 
Tim Roberts, timr@probo.com
Providenza & Boekelheide, Inc.

> * Is the (numerical) FS register content the same over different
> processors?

This is all implementation details. Can change in any service pack.

> selector bases (i.e. the GDT's are different)?

For now, I think that FS selector value is hardcoded constant, and the =
GDTs are different and per-CPU.

--=20
Maxim S. Shatskih
Windows DDK MVP
maxim@storagecraft.com
http://www.storagecraft.com