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[fdl-2] CfP Deadline April 2 > FDL-Forum on specification & Design Languages > Vienna, Austria > Sept 18-20, 2012

[http://www.ecsi.org/sites/default/files/images/FDL%20logo%20203x73px.jpg]<http://www.ecsi.org/fdl>
Call for Contributions
Deadline April 2!
FDL2012
Forum on specification
& Design Languages
Vienna, Austria
September 18-20, 2012
Conference Chair: Jan Haase, TU Vienna

www.ecsi.org/fdl

FDL 2012 is organized with the technical co-sponsorship
of IEEE Austria Section
[http://www.ecsi.org/sites/default/files/images/IEEE.gif]
[http://www.ecsi.org/sites/default/files/images/IEEE_Austria_Logo.png]

Description
FDL is an international forum to exchange experiences and promote new trends
in the application of languages, their associated design methods and tools
for the design of electronic systems. The Forum is organized around four
Thematic Areas (TA) described below and includes working sessions, poster
sessions, embedded tutorials, panels and technical discussions. Industrial
Workshops and Fringe Meetings such as user group or standardization meetings
are also held in conjunction with the Forum.

Technical Areas
1. ABD TA: Assertion Based Design, Verification & Debug
TA Chair: Dominique Borrione (Dominique.Borrione@imag.fr)
ABD TA Description: The ABD Thematic Area welcomes research contributions,
tool demonstrations, reports on standardization activities and effective
applications in all aspects of innovative property expression and
processing, with an emphasis on frontier design levels, verification,
automatic synthesis and mechanized debug aids. The assertion of formal
properties provides a uniform expression of expected system behaviour, or
constraints that are assumed on the environment, for a variety of design
tasks: verification of functional correctness, generation of test stimuli,
synthesis of observation monitors and on-line tests, model checking on the
reachable state space, direct synthesis from assertions, etc. Standardized
formalisms such as PSL and SystemVerilog assertions were initially intended
for synthesizable RTL; their application is now considered at transaction
levels and for mixed system designs.

2. LBSD TA: Language-Based System Design

TA Chair: Martin Radetzki (Martin.Radetzki@informatik.uni-stuttgart.de)

LBSD TA Description: The LBSD TA addresses language-based modelling and
design techniques for simulation, debugging, transformation, and analysis of
digital hardware/software embedded systems. Contributions are welcome on
innovative applications, language or library design, and methodological
aspects. SystemC has undergone restandardization to keep up to date with
users' needs. Hence, contributions on new applications and evolution of
SystemC are highly welcome. Equally welcome are papers dealing with
SystemVerilog, functional languages, UML in conjunction with executable
specification, and emerging languages. Aspects of methodology,
interoperability, simulation semantics, and models of computations will find
an audience just like embedded software modelling techniques and technology
or domain specific approaches, e.g. for signal processing applications or
reconfigurable computing platforms. Moreover, transaction level modelling
(TLM) with any language, IP-based system design (e.g. IP-XACT), modelling
aspects in system synthesis, innovative industrial case studies, and
efficient parallel simulation of high-level models are in scope.

3. EAMS TA: Embedded Analog and Mixed-Signal System Design

TA Chair: Christoph Grimm (grimm@ict.tuwien.ac.at)
EAMS TA Description: The EAMS TA addresses design, modeling, and
verification of heterogeneous systems that include significant part of
analog or continuous behavior such as cyber physical systems, wireless
sensor networks, and of course analog/mixed-signal circuits. A new challenge
is the tight interaction of analog or physical components with - maybe
distributed - digital hardware/software systems. Topics of interest include
specification, modeling, simulation, (symbolic) analysis, verification,
design, (virtual) prototyping, and synthesis of analogue, mixed-signal, and
mixed-technology systems, wireless sensor nets, and cyber physical systems.
Focus of contributions should be on languages, models, representations, and
tools such as VHDL-AMS, SystemC-AMS, Modelica, Matlab/Simulink, etc. The
EAMS TA aims at presenting research activities, design experiences, and
standardization issues related to these topics.

4. UMES TA: UML and MDE for Embedded System Specification & Design

TA Chair: Julio Medina (julio.medina@unican.es)

UMES TA Description: Model driven methods, mostly based on the Unified
Modelling Language, increasingly support semi-formal methods for system
level design of complex embedded systems including multi-core, highly
programmable platforms and heterogeneous Systems-on-Chip. UMES related
research topics in this field are Executable UML, model driven development,
model transformations, UML semantics, meta-modelling, e.g., for SystemC and
other System Description Languages or HDLs, UML profiles, e.g. SysML, MARTE,
UML for SoC, and formalization of UML towards domain specific languages for
simulation and synthesis. Other welcomed topics are standardization work,
modelling languages for real-time and embedded systems, model driven
techniques for performance analysis, validation and verification, SDL, AADL,
OCL, XMI, and practical design experiences with UML or in general model
driven engineering (MDE) approaches.

Special Sessions

FDL 2012 will feature four special sessions. Prospective authors are invited
to submit manuscripts on the following topics:
Model Based Design of Electronic Systems in Systems
Chair: Sumit Adhikari, TU Vienna
Smart Homes
Chairs: Slobodanka Tomic, FTW & Jan Haase, TU Vienna
Energy Harvesting and Ultra-Low-Power Design
Chair: Tom Kazmierski, University of Southampton
Modeling of Aging and Reliability
Chair: Wladek Grabinski, EPFL
Find out more!<http://www.ecsi.org/fdl/call-contributions-special-sessions>

Requirements for Submission

REGULAR AND SHORT PAPERS:

Regular papers provide comprehensive details on innovative and complete
research or applicative work with evidence of experimental results. Regular
papers may also include proposals for standardization. Authors are
encouraged to outline work in progress, industrial case studies, or user
experiences as short papers. Accepted short papers will be presented as
posters in dedicated sessions, allowing to present advances achieved since
submission. Submitted papers should be anonymous, are required to describe
original unpublished work and must not be under consideration for
publication elsewhere.

PUBLICATIONS:

After the conference, papers and presentations will be published on the ECSI
website together with the keynote presentations (subject to confidentiality
issues) and tutorial documents. In addition, the accepted and presented
papers will be published in IEEE Xplore. The authors of the best regular
papers may be invited to prepare an extended manuscript for journal
publication.

EMBEDDED TUTORIALS:

Proposals for half-day (4 hours) embedded tutorials on specific topics
around any of the four workshops will be accepted depending on topic
relevance and evidence of a comprehensive agenda. A one page description of
the tutorial including title, presenters, contents, and the relevant
track(s) should be sent to fdl2012@ecsi.org. A maximum of three tutorial
authors is recommended. Accepted tutorials will get one free registration to
the Forum per tutorial.

PANELS, SPECIAL SESSIONS, WORKING GROUPS, PROJECT MEETINGS, DEMONSTRATIONS:

Proposal for special sessions (panels, working sessions, standardization or
user group meetings, etc.) around any of the four TA tracks are invited and
will be accepted depending on their relevance and interest to the audience.
They will be embedded in regular workshops. A one page description including
title, participants, contents, and the relevant track(s) should be sent to
fdl2012@ecsi.org. Companies, universities or other organizations wishing to
demonstrate innovative tools and environments for the topics described above
should send proposals to fdl2012@ecsi.org.

Important Dates
Paper submission deadline:
Special session & embedded tutorial proposal deadline:
Notification of acceptance:
Final versions of accepted papers & presenters' registration:
Proposals for on-site meetings:
FDL 2012:



02 April 2012
09 April 2012
30 May 2012
30 July 2012
30 August 2012
18-20 Sept 2012

Follow FDL on LinkedIn!
[http://www.ecsi.org/sites/default/files/images/linkedin.jpg]<http://www.linkedin.com/groups?about=&gid=4197234&trk=anet_ug_grppro>


FDL Books
FDL books and proceedings are for sale.
ECSI Members receive 40% off!
http://www.ecsi.org/list-of-books

-       Proceedings of the 2011 Forum on specification & Design Languages
(FDL)

-       Advances in Design Methods from Modeling Languages for Embedded
Systems and SoCs from FDL 2009

-       Languages for Embedded Systems and their Applications Selected
Contributions on Specification, Design, and Verification from FDL 2008

-       Embedded Systems Specification and Design Languages from FDL 2007

-       Advances in Design and Specification Languages for Embedded Systems
(FDL 2006)
And more!

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Help construct a tree 1 -> 1.1 -> 1.2 -> 2 -> 2.1 -> 2.1.1 etc HELP !!!!!!!
Borland Guru's I need help I have a text file as follows: 1 2 1.1 1.1.1 3.3 2.3 etc I cannot use a control active x tree I need to read this file and 1 is a parent 1.1 is a child of parent 1 and 2 is a parent 2.3 is a child of parent 2 and construct in search a way using arrays or probably a recursive function No xml parsing just read a file. Does any body have a function "Mos" <lndebug@gmail.com> wrote in message news:c1aaeb20-3c1f-408d-9986-bb8d28a87509@s31g2000vbp.googlegroups.com... > I have a text file as follows: > 1 > 2 > 1.1 >...

Help construct a tree 1 -> 1.1 -> 1.2 -> 2 -> 2.1 -> 2.1.1 etc HELP !!!!!!!
Folks I need help. I have a view or(Text file) as follows: '1 2.1 1.1.1 1.1.1.1 2.2.1 1.3 2 Dim Parent() As String Dim Level1() As String Dim Level2() As String Dim Level3() As String etc .. How can I construct a tree. parent, children, grand children etc... and also figure out # of children # of grand children etc Thanks "Mos" <lndebug@gmail.com> wrote in message news:875cd1df-7605-45ab-9f7b-f1edec25d47b@r34g2000vbi.googlegroups.com... > Folks I need help. I have a view or(Text file) as follows: > > '1 > 2.1 > 1.1.1 > 1....

[dasip-2] CfP Deadline April 30 > DASIP Conference > October 23-25, Karlsruhe, Germany #2
[http://www.ecsi.org/sites/default/files/images/DASIP%20LOGO_257x73px.jpg]<h ttp://www.ecsi.org/dasip> The 2012 Conference on Design and Architectures for Signal and Image Processing Karlsruhe, Germany October 23-25, 2012 Call for Contributions Deadline April 30! General Co-Chairs: Michael H�bner, Ruhr-Universit�t Bochum, Germany Daniel Chillet, Universit� de Rennes 1, France www.ecsi.org/dasip DASIP 2012 is organized with the technical co-sponsorship of the IEEE Signal Processing Society. [http://www.ecsi.org/sites/default/files/images/IEEE.gif] [http://www.ecsi.org/sites/default/files/images/Logo_SPS_small.gif] Description The DASIP Organization Committee and ECSI are pleased to invite you to the Design and Architectures for Signal and Image Processing (DASIP) 2012 Conference that will take place in Karlsruhe, Germany, October 23-25. The goals of DASIP are to present the latest results in the domain of design and architecture for signal, communication and image processing and to provide to researcher and industry community a reference exchange platform addressing this topic. The conference program includes keynote speeches, contributed paper sessions, poster sessions and demonstrations. Prospective authors are invited to submit manuscripts on topics including, but not limited to: Design Methods and Tools Design verification and fault tolerance Embedded system security and security validation System-level design and hardware/software co-design Communication synthesi...

Web resources about - [fdl-2] CfP Deadline April 2 > FDL-Forum on specification & Design Languages > Vienna, Austria > Sept 18-20, 2012 - comp.parallel

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