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[TCPP-announce] CFP: IPDPS-WMPP-2004: Workshop on Massively Parallel Processing

***************************************************************
*                                                             *
*                      CALL FOR PAPERS                        *
*                                                             *
*   Fourth Workshop on Massively Parallel Processing (WMPP)   *
*                                                             *
*                                                             *
*    <http://www.cs.kent.edu/~parallel/workshops/ipdps04-mpp>
http://www.cs.kent.edu/~parallel/workshops/ipdps04-mpp    *
*                                                             *
*                       30 April 2004                         *
*                                                             *
*                          at the                             *
*                                                             *
* International Parallel and Distributed Processing Symposium *
*                         IPDPS'04                            *
*                                                             *
*                 Santa Fe, New Mexico, USA                   *
*                                                             *
***************************************************************
 

The Workshop on Massively Parallel Processing is a forum for
the discussion of parallel processing involving hundreds to 
thousands of processors.  Topics range from novel architectures 
to algorithms to applications.
 
The Fourth Workshop on Massively Parallel Processing (WMPP'04) 
builds on the success of the three previous successful 
workshops,held as part of IPDPS'01 ( <http://ipdps.org/ipdps2001/>
http://ipdps.org/ipdps2001/), 
IPDPS'02 ( <http://ipdps.org/ipdps2002/> http://ipdps.org/ipdps2002/),
and IPDPS'03 
( <http://ipdps.org/ipdps2003/> http://ipdps.org/ipdps2003/)
respectively.  WMPP has picked up 
momentum and is now pushing the limits of single day format.  
Technical presentations have come from industry (e.g. IBM), from 
national laboratories (e.g. UCAR, JPL), and from academic
institutions from across the globe.
 
The First ( <http://www.cs.kent.edu/~parallel/workshops/ipdps01-mpp>
http://www.cs.kent.edu/~parallel/workshops/ipdps01-mpp)
and Second ( <http://www.cs.kent.edu/~parallel/workshops/ipdps02-mpp>
http://www.cs.kent.edu/~parallel/workshops/ipdps02-mpp)
workshops featured invited keynote talks by Peter Kogge of Notre Dame 
( <http://www.nd.edu/~kogge> http://www.nd.edu/~kogge) and David Bader
of the University of 
New Mexico ( <http://www.eece.unm.edu/~dbader>
http://www.eece.unm.edu/~dbader) respectively.
 
The Third workshop (
<http://www.cs.kent.edu/~parallel/workshops/ipdps03-mpp>
http://www.cs.kent.edu/~parallel/workshops/ipdps03-mpp)
featured an invited keynote talk by Thomas Sterling 
( <http://www.cacr.caltech.edu/~tron/bio.html>
http://www.cacr.caltech.edu/~tron/bio.html) of Cal Tech and NASA JPL.
Following the usual practice at IPDPS, all WMPP papers have been
published with the paper abstracts in a hardcopy volume and the
complete paper in an accompanying CD-ROM.
 
WMPP'04 is soliciting papers for general sessions as well as two
special sessions on massive parallelism for solving grand challenge
problems and on massive parallelism using FPGAs for architectural
research.  The invited keynote talk for the Fourth workshop will be
Mootaz Elnozahy, Senior Manager and Master Inventor at IBM Research in
Austin Texas.
 

General Sessions:
-----------------
WMPP'04 is now soliciting papers for the general sessions.  Manuscripts 
containing original unpublished research are solicited in all areas of 
massively parallel processing.  Topics of interest include, but are not
limited to, the following:
 
* Algorithms and models for massively parallel computation
* SIMD and MIMD massively parallel systems case studies
* Teraflop and petaflop system development and application experience
* Intelligent memories and processing in memory system development 
  experience
* Data parallel and associative computing
* Scalable I/O and mass storage in support of massive parallelism
* Case studies and performance analysis of massively parallel systems 
  and applications
* Resource management for massively parallel applications
* Domain specific libraries and application experiences
* Experience with use of commercial and experimental massively parallel 
  systems
* System software and tools for massively parallel computing
 

Special Session on Massive Parallelism for Solving Grand Challenge
Problems:
------------------------------------------------------------------------
----
Someone once said "The difference between theory and practice is
theoretically negligible but practically worlds apart."
Theoretically, the world's super-clusters and supercomputers are
capable of enormous peak performance and can be easily programmed in
any number of languages.  Practically, this is only achievable for
certain "pleasantly parallel" (to quote H.J. Siegel) algorithms.  This
session seeks papers that explore real-world applications executed on
massively parallel processing systems.  Topics include, but are not
restricted to, the following:
 

* What applications have been successfully scaled onto MPPs?
* What unexpected "surprises" (both good and bad) have arisen when 
  scaling onto MPPs?
* What algorithms are well suited to MPPs that are not so well suited 
  for clusters?
* What programming environments work best for MPPs? 
* Experimental results showing the human efficiency of one 
  programming language over another, even though "peak performance"
  (for the processors) is not as high
 

Special Session on Massive Parallelism Using FPGAs for Architecture
Research:
------------------------------------------------------------------------
-----
Although we usually think of massive parallelism in terms of larger
machines, today's FPGAs contain tens of thousands of logic elements,
distributed embedded memory, and flexible interconnect, and are
essentially massively parallel processors.  What have we learned from
MPP systems in a rack that can be applied to MPP systems on a chip?
This session is not restricted to FPGAs, but to facilitate comparison,
we suggest that results be in terms of FPGA gates, extrapolated to at
least 1024 "processors".  Topics include, but are not restricted to:
 
* What are the issues for Massively Parallel Systems on a Chip? 
* Special purpose processing elements for particular applications that 
  emphasize speed, size, power, simplicity, etc.
* Single chip (or single card) MPPs as co-processors for workstations
* Architectural frameworks that combine fixed and customizable
components
* Mapping of older MPPs that used to consume racks of space into a
single 
  or multiple FPGAs
* I/O architectures and methods of interfacing with MPP FPGA's
 

Important Dates:
----------------
* Submissions Due: 9am EST 8 December 2003
* Notification of Acceptance: 5 January 2004
* Final version Due: 26 January 2004 (TENTATIVE DATE)
 

Submission Guidelines:
----------------------
Authors should submit an electronic version of their paper
for review through the online submission form on the WMPP web site
by 9am Eastern Standard Time on 8 December 2003.  Submissions should be 
a complete manuscript in Adobe PDF or PostScript format (PDF preferred),

formatted single-spaced in a 12 point font, with no more than 12 pages.
Submissions must include the submission title; authors' full names, 
addresses, phone numbers, and FAX numbers; as well as the authors' 
email addresses.  All manuscripts received by this date will be reviewed

by the program committee; authors will be notified of the paper's 
acceptance or rejection by email.
 

Workshop Organizers:
--------------------
  Organizing Committee:
 
    General Co-Chairs:
     * Robert Walker, Kent State University (
<mailto:walker@cs.kent.edu> mailto:walker@cs.kent.edu)
     * Johnnie Baker, Kent State University (
<mailto:jbaker@cs.kent.edu> mailto:jbaker@cs.kent.edu)
 
    Program Co-Chairs:
     * Raymond Hoare, University of Pittsburgh (
<mailto:hoare@ee.pitt.edu> mailto:hoare@ee.pitt.edu)
     * Philip A. Wilsey, University of Cincinnati (
<mailto:paw@ececs.uc.edu> mailto:paw@ececs.uc.edu)
 
    Publicity Committee:
     * Michael Scherger, Kent State University (
<mailto:mscherge@cs.kent.edu> mailto:mscherge@cs.kent.edu)
 
  Program Committee:
   * Nael Abu-Ghazaleh, SUNY Binghamton
   * David Andrews, University of Kansas
   * Johnnie Baker, Kent State University
   * Thomas Braunl, The University of Western Australia
   * Ray Hoare, University of Pittsburgh
   * Mahmut Kandemir, Penn State University
   * Peter Kogge, Notre Dame University
   * H. J. Siegel, Colorado State University
   * Theo Ungerer, University of Augsburg
   * Robert Walker, Kent State University
   * Philip A. Wilsey, University of Cincinnati
   * Jie Wu, Florida Atlantic University
 
 
 
 <http://www.cs.kent.edu/~parallel/workshops/ipdps04-mpp>
http://www.cs.kent.edu/~parallel/workshops/ipdps04-mpp
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[Apologies if you receive multiple copies] =20 ###########################################################################= ###### CALL FOR PAPERS The 1st IEEE Workshop on Parallel and Distributed Processing for Computatio= nal Social Systems May 27 2016, Chicago Hyatt Regency, Chicago, Illinois USA. Conference Website: http://www.lcid.cs.iit.edu/parsocial Contact Email : parsocial@cs.iit.edu (In conjunction with IEEE International Parallel & Distributed Processing S= ymposium (IPDPS)) =20 IMPORTANT DATES Paper submission deadline: January 11, 2016 Notification of ac...

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Second Workshop on System Management Tools for Large-Scale Parallel Systems (Held in Conjunction with IPDPS 2006, Rhodes Island, Greece) ****************************************************************************** We are entering a new era in computing where the size and complexity of scientific and engineering simulations is growing at a speed that has never been observed before. In order to satisfy the needs of these applications, parallel systems with an "extreme-scale" are being designed and deployed. Although the progress in hardware and architecture design has made it possible to build machines with tens of thousands of processors, the development of software tools for such systems is still lagging behind. To name just a few examples, new operating system level modifications are needed to efficiently utilize the massive computing and networking power. In addition, sophisticated fault-tolerant tools are in great need to minimize the performance loss under a faulty condition and to automate the recovery process which can further reduce management costs. The scale of the systems also demands advanced power management tools. From the list of top 500 supercomputers, top 10 are dominated by special purpose clusters either built using some of the standard commodities or specially built for the customers only. Even if some of the supercomputers are based on general purpose processors and networking, the system maintenance, reliability, faul...

[TCPP-announce] Cfp: Grid Education workshop at CCGrid 2004, April 19-22, Chicago
We apologize for possible multiple copies of this message. - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Dear colleagues: You are invited to submit a paper (see instructions below). C A L L F O R P A P E R S International Workshop on Grid Education - Grid.Edu 2004 ************** to be held in conjunction with CCGrid 2004 April 19-22, 2004, in Chicago, Illinois. submission deadline: December 15, 2003 * Motivation: ------------- The growing capability of Grids as viable compute resource brokers is largely responsible for their acceptance beyond the traditional high-performance (HPC) research community. As applications become more grid-enabled, the business community is expected to increase significantly its investments in Grid computing over the next decade. These increasing demands for Grid computing, coupled with continued advancements in middleware and networking technologies, have raised concerns about the availability of a qualified workforce to address Grid-related issues. This workshop addresses issues in training a Grid workforce for the HPC research community and beyond. * Topics of special interest: ----------------------------- Papers are invited that describe techniques, experiences, classroom activities, and academic or professional courses related to Grid education. Topics include but are not limited to: * Selection and presentation of topics for a m...

[TCPP-announce] CFP: 5th IEEE/ACM International Workshop on Grid Computing (Grid 2004)
---------------------------------------------------------------------------- -------- 5th IEEE/ACM International Workshop on Grid Computing (Grid 2004) November 8, 2004, Pittsburgh, USA (held inconjunction with SuperComputing 2004) http://www.gridbus.org/grid2004/ OR http://www.gridcomputing.org Sponsored by: ------------- * IEEE Computer Society (CS) * IEEE CS Task Force on Cluster Computing * Association for Computing Machinery (ACM) Call For Papers =============== General Information and Scope ----------------------------- In the last few years, the Grid community has been growing very rapidly and many new technologies and components have been proposed. This, along with the growing popularity Web-based technologies, and the availability of cheap commodity components is changing the way we do computing and business. There are now many ongoing grid projects with research and production-oriented goals. Grid 2004 is an international meeting that brings together a community of researchers, developers, practitioners, and users involved with the Grid. The objective of Grid 2004 is to serve as a forum to present current and emerging work as well as to exchange research ideas in this field. The previous events that are part of this series of events were Grid 2000, Bangalore, India; G...

[TCPP-announce] Cfp-CAC'04 (deadline extended to Nov. 10)-Workshop on Communication Architecture for Clusters (held with IPDPS'04)
Call For Papers Workshop on Communication Architecture for Clusters (CAC '04) To be held in Conjunction with Int'l Parallel and Distributed Processing Symposium (IPDPS '04) Santa Fe, New Mexico Eldorado Hotel, April 26-30, 2004 ------------------------------------------------------------------------ - Due to multiple requests, the paper submission deadline has been extended to Nov. 10, 2003. The perspective authors are requested to submit an abstract, title, and author information by Nov. 7, 2003. ------------------------------------------------------------------------ - THEME: The availability of commodity PCs/workstations and high-speed networks (Local Area Networks and System Area Networks) at low prices enabled the development of low-cost clusters. These clusters are being targeted for support of traditional high-end computing applications as well as emerging applications, especially those requiring high-performance servers. Designing high-performance and scalable clusters for these emerging applications requires design and development of high-performance communication and I/O subsystems, low-overhead programming environment support and support for Quality of Service (QoS). New standards such as InfiniBand Architecture (IBA) and PCI Express AS, and availability of high-speed networking products (Myrinet, Quadrics, IBA 4X, and 10GigEthernet) are providing exciting ways to design...

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