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Call for Papers! > System, Software, SoC and Silicon Debug Conference (S4D) > Oct 5-6, 2011, Munich, Germany

[http://www.ecsi.org/sites/default/files/images/munich6small7.jpg]
 [http://www.ecsi.org/sites/default/files/images/S4D%20logo%20small.jpg]
System, Software, SoC and Silicon Debug Conference
October 5-6, 2011
Munich, Germany
Call for Contributions
Chair: Pat Brouillette, Intel Corporation

www.ecsi.org/s4d


Description
Embedded systems and software complexity is rapidly increasing; from one
processor to ten or more, from thousands of lines of code to millions.
Modern system-on-chips integrate dozens of hardware accelerators and I/O
devices. Modern products integrate hard IP and software from many more
sources than in the recent past. Embedded systems debug capabilities must
scale with this exponential growth in system complexity.
This third edition of S4D Conference has evolved from several industry
workshops organized by ECSI into the areas of debug and provides a forum for
work and standardization efforts related to debug of electronic systems,
with a focus on multi-core and multi-accelerator SoCs. The conference
addresses a vast set of requirements from system and SoC companies with
regard to debug methods and tools. It includes efforts from IEEE and other
standards working groups, including the Nexus 5001 Forum, IJTAG (IEEE
P1687), IEEE 1149.7, MIPI, industry working groups including OCP-IP, the
Multicore Association (MCA), the Accellera - SPIRIT Consortium and Eclipse
and industry R&D projects contributing to debug and related tools and
methods development. The S4D Conference event also allows presentation and
discussion of existing and new commercial debug tools and products related
to electronic (silicon and software) methods, devices, and systems. In
summary, the S4D conference provides a forum for discussing research,
scientific and commercial development in the areas of system, software, SoC
and silicon debug.
Come present research, tools, or methodologies that help eliminate bugs
embedded in hardware and/or software at any stage of product development.
Potential topics include market/human research on trends in debug
requirements for developers of embedded systems and standardization
activities for debug and debug automation.

Topics of Interest
�         System Level Debug, improving visibility
�         Architecture, design analysis
�         Human factors; bug sources and our behaviors in preventing and
eliminating them
�         Real-time debug analysis and tracing
�         Debug tools and activities throughout the product development
life-cycle
�         System Performance Analysis and Optimization
�         Multi-core and heterogeneous core debug
�         Debug in a co-development environment
�         On-die debug capabilities
�         Software debug/analysis infrastructure DFT Reuse for Debug and
Analysis
�         Transitioning debug and test among model, simulation, FPGA, and
Post-silicon
�         Bug capture automation and reproduction
�         Debugging of IP blocks and their Integration
�         Debug Architectures and Interfaces
�         Digital/Analog Debug
�         Tools for Debug, Analysis and Optimization
�         Tools and Equipment Impact
�         Debug Case Studies
�         Debug R&D Initiatives Debug Standards
The above list is not an exhaustive list of topics addressed by S4D; related
contributions not listed here are highly welcome. Submissions may be
theoretical scientific papers, research in progress, case studies, tool use
cases and best practice, as well as industry experiences.


Submission Requirements

Paper Submission

Authors should submit their abstracts of minimum 2 pages, double-column IEEE
format, in PDF through the web-based submission system. The abstract should
describe main contributions, concepts, innovation and conclusions. The
abstract may not contain confidential information. The submitted paper must
not mention names and affiliations of the authors. Submitted papers are
required to describe original unpublished work and must not be under
consideration for publication elsewhere. Proceedings of S4D 2011 Conference
will be published in the ECSI Resource Center.at www.ecsi.org.

Paper submission details can be found at
www.ecsi.org/s4d<http://www.ecsi.org/s4d>.

Panels, Special Sessions, Working Groups, Project Meetings, Embedded
Tutorials

Proposals for special sessions (panels, working sessions, standardization or
user group meetings, etc.) as well as proposals for half-day (4 hours)
embedded tutorials are invited. Acceptance will be based on relevance and
potential interest. Special sessions will be embedded in regular workshops.
Accepted tutorials will receive one free registration to the S4D Conference
per tutorial. A one page description of the tutorial or special sessions
including title, presenters, contents, and the relevant track(s) should be
sent to S4D2011@ecsi.org<mailto:S4D2011@ecsi.org>.

Demonstrations

Companies, universities or other organizations providing innovative tools
and environments for the described topics will find in S4D an opportunity to
demonstrate these tools and environments to attendees. Proposals should be
sent to S4D2011@ecsi.org<mailto:S4D2011@ecsi.org> as soon as possible.


Important Dates

Paper submission deadline


May 23, 2011


Notification of acceptance


June 29, 2011


Camera ready papers


September 5, 2011



Demonstration Opportunities

ECSI Member Opportunities
Opportunities for ECSI members: including free of charge demonstration
booths, publicity and reduced registration rates! Find out more about ECSI
membership at www.ecsi.org<http://www.ecsi.org/>

Sponsorship Opportunities

Please, note that the demonstration facilities are available only for ECSI
Members and the Sponsors. Find out more about sponsoring the S4D Conference
by contacting us at office@ecsi.org<mailto:office@ecsi.org>!

Program Committee
Local Organizer
Infineon Technologies
Steering Committee
Pat Brouillette, Intel
Albrecht Mayer, Infineon
Adam Morawiec, ECSI
Markus Winterholer, Cadence
Program Committee
Tapani Ahonen, TUT
Sean Baartmans, Intel
Jens Braunes, pls Programmierbare Logik & Systeme GmbH, pls Development
Tools
Pat Brouillette, Intel
Al Crouch, Asset-Intertech
Philippe Cuenot, Continental
Serge De Paoli STMicroelectronics
Stylianos Diamantidis Globetech Solutions
Jakob Engblom, Wind River
Philipp Graf, FZIy
Ziyad Hanna, Jasper Design Automation
Andreas Hoffmann, Synopsys
Rohit Kapur, Synopsys
Rolf K�hnis, Nokia
Gilbert Laurenti, Texas Instruments
Rainer Leupers, RWTH AACHEN University
Markus Levy, MCA
Andrea Martin, Lauterbach
Albrecht Mayer, Infineon
Klaus McDonald-Maier, University of Essex / UltraSoC
Adam Morawiec, ECSI
Brenden Mullane, University of Limerick
Chris Ng, IBM
Robert Oshana, Freescale
Fr�d�ric Petrot, TIMA Laboratory
Serge Poublan, ARM
Paolo Prinetto, Politecnico di Torino
David Riemens, NXP Semiconductors
Peter R�ssler, University of Applied Sciences Technikum Wien
Neal Stollon, HDL Dynamics
Erich Styger, Freescale
Alan P. Su, GCU
Tobias Schwalb, KIT
Thomas Ulber, Mentor Graphics
Bart Vermeulen, NXP Semiconductors
Alexander Weiss, Accemic GmbH & Co. KG
Michael Williams, ARM
Markus Winterholer, Cadence Design Systems
Hans-Joachim Wunderlich, Univeristy of Stuttgart

Please, transfer this message to persons interested in this topic!
We apologise if you have received multiple copies of this message!
Please click here<http://www.ecsi.org/remove-mailing-list> if you wish to be
removed from this mailing list.
Please do not reply to this email address. Direct contact information can be
found at www.ecsi.org<http://www.ecsi.org/>.
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Resources last updated: 3/24/2016 6:43:42 PM