"CodeX" <apwv18@[nospam]xtreme2.pipex.net> writes:
>can someone please explain in english how the 6510 DDR / IO port works
>($00 - $01)
>how does the ddr at $00 effect the IO ($01) ???
The Data Direction Register determines which bits of the I/O Register
are reads and writes. On startup, $0 is set to 239 ($ef) which sets all
of $1 to outputs (i.e., writes) except for Bit 4, which is used for cassette
Thus, in the default configuration, bit 0 of $1 is active and controls LORAM,
bit 1 of $1 is active and controls HIRAM, bit 2 of $1 is active and controls
CHAREN, bit 3 of $1 is active and is wired to the cassette data output line,
bit 4 is *not* active and *receives* (not sets) data from the cassette
switch sense, bit 5 of $1 is active and is wired to the cassette motor line,
and even though bits 6 and 7 are also active, they aren't wired to anything.
Note that the functions of the lines are hard-wired, but $0 can control
how the I/O bit in $1 that controls that line is interpreted.
Cameron Kaiser * email@example.com * posting with a Commodore 128
personal page: http://www.armory.com/%7Espectre/
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