investigating ppc code defs on Open Firmware Macs0113 (5/4/2009 12:29:25 AM) Now that a Public Domain 'asm' and 'dasm' have been made available for
PowerPC Macintosh Open Firmware, we finally get a look under the hood.
"dis.of", the PD source file, also patches the Apple-supplied 's... tinkerer(33)
[Q] EABI for SPE (e200 core)0142 (2/11/2009 6:25:34 PM) Hi,
I did not yet find a link explaining the EABI differences for EABI
w.r.t. the upper 32bits if SPE is activated.
So far I assume the normal ABI applies, means e.g. r3..r11/r12 are
parameter/scratch r... bastian42(358)
FP Unavailable Exception in 603e0179 (1/8/2009 11:38:35 PM) I am trying to recover from an FP_Unavailable_ISR () without any
My pseudo code is:
disable all interrupts () // MSR has all zeros including FP bit
exec a Floating POint instruction such as... Sbell
MCPN750 stand-alone operating mode0131 (12/8/2008 11:15:46 PM) How do I put the MCPN750 into stand-alone operating mode? I can find
how to put the MCPN750A into stand-alone operating mode but not the
MCPN750, which has 8 pins for jumper J8 as opposed to the MCPN750A's 2
MCPN750A stand-alone mode1115 (12/8/2008 5:58:52 PM) I would like to configure a MCPN750A board to operate in stand-alone
mode so it can function without the clock from the system slot
controller board. According to the documentation I possess, this is
done by... james
MPC5200B PCI I/O cycles3116 (11/27/2008 4:32:29 AM) After many hours of trial and error let me try the group.
I am trying to bring to life the PCI interface of an MPC5200B.
I cannot make it initiate an I/O (let alone config) cycle.
It just will never asse... dp(801)
PowerPc MMU config for Memory protection only1249 (10/15/2008 10:01:27 PM) Hi all
I need to use PowerPc 603E and I want only to use MMU for memory
without any virtual memory. Is that possible?. I don't need and don't
have an RTOS in my embedded
app, no tasks/thr... Sbell
lwarx and stwcx instruction3209 (9/30/2008 5:04:39 PM) I am working on a xlinx fpga with two powerpc that shared a bram
This instruction lwarx and stwcx are able to assure the two cpu can do
atomically access in shared memory?
I don't understand if this... alessio211734(30)
problem in configuring the ipic interrupt0130 (8/26/2008 4:39:15 AM) hi ,
i am using mpc8315 power pc... i need to configure the externel
interrupt using ipic... i m using linux 2.6.23 version...
below is my interrupt initialization code which i writtern inside the