I've been trying to do a simple loopback test using HDLC/SCC. Here is
my initialization sequence:
1) Set parallel io pins 30-31 for internal loopback
2) set rx/tx clocks for scc1 using brg3
3) Issue a stop_tx command to the cpm
4) Configure dsr & psmr
5) Configure hdlc pram
6) Initialize rx/tx bds(all located in dpram).
7) Establish bd rbase/tbase
8) Initialize sccm register & clear scc events
9) Enable interrupts to scc1 through simr_l register
10) Issue CPM init/restart
11) Enable rx/tx transmission through gsmr_l
12) Finally, i point the bd's buffer pointer to a test string and set
the R bit for that bd.
I've failed in obtaining any transmission related interrupt using this
process. I suspect something related to clock configuration, though
couldn't resolve the issue.
Any one can point out where I am doing wrong?