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Parallel processing applications

What are the killer parallel processing applications of the year 
2004/2005. By that I mean, what are mid level applications for massively 
parallel architectures?

When the FPGA Transputer is finished, what applications will use it? 
Budget Grid computing?
Remote processing farms?

Anyone got ideas?
0
dave
4/17/2005 7:07:41 PM
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dave wrote:
> What are the killer parallel processing applications of the year 
> 2004/2005. By that I mean, what are mid level applications for massively 
> parallel architectures?
> 
> When the FPGA Transputer is finished, what applications will use it? 
> Budget Grid computing?
> Remote processing farms?
> 
> Anyone got ideas?

I would vote 'budget transparent grid comptuting' for starters.. perhaps 
extended to handheld wireless devices, as you roam around you magically 
are part of the comptuting grid... Sure your little handheld wont 
actually contribute much, but it would contribute and benefit from the 
collective. ( and before you laugh, i did see an advertisement for a 
handheld PDA "development deveice" powered by a FPGA.. jsut cant 
remember where now.. :( )

But, as a runner up vote: I'm a amatur 3d modeler by heart.. so i can 
see a use for that :)
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Ziggy
4/17/2005 8:48:41 PM
Little on the speculation side but if I recover my sanity and some of
my investment, a research project I have in mind would be EDA
development to see if its possible to do real time FPGA layout &
design, treating the FPGA as a responsive canvas of cells. Draw & place
the cell instances and get immediate response about how fast the design
is given some knowledge of the device. Same also for ASIC design but it
requires low level HDL code already synthesized. If that works the same
netlist fed into std P/R tool would then give the bitfile in the usual
lengthy period of time.

regards

johnjakson at usa dot com
transp[uter2 at yahoo dot com

0
JJ
4/17/2005 11:57:39 PM
<snip>

> netlist fed into std P/R tool would then give the bitfile in the usual
> lengthy period of time.

Producing these bitfiles sounds like an apt area for parallelization. 
Are code or algorithms for this "Conversion" / "Synthesis" process 
available in the public domain? GHDL?

> 
> regards
> 
> johnjakson at usa dot com
> transp[uter2 at yahoo dot com
> 
0
dave
4/18/2005 5:15:00 PM
Most synthesis is now highly tangled with place & route and timing
driven with specific technologies targeted, so open synthesis is
probably gone. Plain synthesis makes no sense anymore unless you have a
very simple wire load model, but wiring today is half the cycle delays.


If an application consists of HDL code (Verilog in particular) that cun
run as event driven code within the same process model, moving the code
to webpack or anothet synthesis tool shouldn't be much of a problem.
Most of the user interaction would be within  this hypothetical
application which has only a simple (but hopefully usefull) model of
FPGA or ASIC internals, only the final much longer P/R would be done in
std tool flow. This might also become another longterm project, can't
say at this time.

If you ever tried to iterate within Webpack minute changes to a hdl &
ucf placement and see if it goes faster slower when you move registers
around, you know it gets tedious within a few iterations, when
thousands are needed. The task is not neccesarily even compute
intensive, just that nobody seems to want to go & do it. It could be
done within a std C++ EDA framework alone, but that would have much in
common with this project so I will defer to building on this project.

Such a tool uses what the Java folks might call introspection to see
inside its own structure, in this case an OS would allow the process
viewer to subclass the viewer and add application specific viewer of
running process. One can walk the process tree and render it anyway
that makes sence for that process tree.

If an app were written in Occam to model say biomolecular constructor
kit, one could use an entirely different renderer to draw 3d molecules.
The internal process list structure though uses multiple bidirectional
link lists, these might first have to be converted to another form such
as quad trees depending on the application.


Hope that helps

johnjakson at usa dot com
transputer2 at yahoo dot com

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JJ
4/18/2005 9:40:55 PM
One of the applications that I came across this past year is real-time
video surveillance. Imagine a guard sitting in front of a bank of video
monitors for a plant or office building. After about 4 to 6 hours
(depending on the individual) their attention isn't as attentive and
they are not as effective watching the monitors. They are currently
developing systems that can identify people, animals, vehicles or other
things of interest. Colors are flattened and a red box, outlining the
object of interest is highlighted, bring this to the surveillance
guards attention. The objects are track and recorded.

The conference I was an interest in real-time image processing for
consumer products. The implementation was for installing small video
cameras in the front and back of vehicles. They are connected to a
small processing array and to display in the dash. The system would
warm the drive when they are getting dangerous close to other vehicles
or objects. They would also assist with cruise control and adjust the
vehicles speed to other vehicles.

There was also discussions on using processing element arrays to
accelerate video encoding/decoding, computer graphics and digital
signal processing but nothing really new worth noting.

Derek

0
DerekSimmons
4/20/2005 3:00:13 PM
A more mundane app I also have in mind is just a replacement for a PC
more for development and experimentation. I'm sure it wouldn't be that
difficult to build a basic workstation with GUI, local filesystem, nix
command line ie cycgwin, but the idea of networking stack, web browser
and basic office apps scares me.

Since its FPGA hosted, thats where most all of the HW goes too, there
are quite a few of these PC like FPGA boards out there but usually with
mediocre VGA and PS2 connections.

Still if anyone is familiar with BeOS they will know what a highly
threaded OS feels like even on a 200MHz PC. One aspect to explore there
is making it as reliable as one expects HW to be, using HDL for the
codecs, and C/Occam in general for the user OS, have to wait and see.

regards

JJ

0
JJ
4/20/2005 10:12:06 PM
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