I trying to split out the names of targets passed to a define
Here is my Makefile
define xxx
 @echo $(1)
endef

..PHONY : all build.proj build.proj.bb build.proj.bb.topic

all : build.proj build.proj.bb build.proj.bb.topic

build.proj :
        $(call xxx , $@)

build.proj.bb :
        $(call xxx , $@)

build.proj.bb.topic :
        $(call xxx , $@)


The above prints each target as expected.
I need to seperate each part of the target into seperate variables.
The build I don't need.  There are 8 names that are in the location of
build.

I've tried
@echo $(substr . , , $(1))

nothing prints.

 @echo $($(1):.=)

nothing prints

Got it
define xxx
  @echo $(shell echo $(1) | sed 's:\.: :g')
endef

Now how do I get this assigned to a new variable?
define xxx
  @TMP="$(shell echo $(1) | sed 's:\.: :g')"
  echo ${TMP}
endef


The echo prints an empty line
I need to do
if [ $(words ${TMP} = 2 ] ; then \
  do something with $(word 2, ${TMP}); \
else if [ $(words ${TMP} = 3 ] ; then \
  do something with $(word 2, ${TMP}) && $(word 3, ${TMP}); \
else if [ $(words ${TMP} = 4 ] ; then \
  do somethingwith $(word 2, ${TMP}) && $(word 3, ${TMP}) && $(word 4,
${TMP}); \
fi fi fi

%% "billy" <bp1497@att.com> writes:

  b> I need to seperate each part of the target into seperate variables.
  b> The build I don't need.  There are 8 names that are in the location of
  b> build.

  b> I've tried
  b> @echo $(substr . , , $(1))

  b> nothing prints.

That's because there is no such function as "substr" in GNU make.

You want $(subst ., ,$(1)) instead.

See the GNU make manual chapter "Functions for Transforming Text".

-- 
-------------------------------------------------------------------------------
 Paul D. Smith <psmith@gnu.org>          Find some GNU make tips at:
 http://www.gnu.org                      http://make.paulandlesley.org
 "Please remain calm...I may be mad, but I am a professional." --Mad Scientist

%% "billy" <bp1497@att.com> writes:

  b> Got it
  b> define xxx
  b>   @echo $(shell echo $(1) | sed 's:\.: :g')
  b> endef

This is a "useless use of $(shell ...)"; you're already IN a shell when
you write a command script in make, so why bother invoking _another_
shell to do the sed?  If you want to do it with shell commands instead
of make functions, just write:

> define xxx
>   @echo $(1) | sed 's:\.: :g'
> endef

-- 
-------------------------------------------------------------------------------
 Paul D. Smith <psmith@gnu.org>          Find some GNU make tips at:
 http://www.gnu.org                      http://make.paulandlesley.org
 "Please remain calm...I may be mad, but I am a professional." --Mad Scientist

%% "billy" <bp1497@att.com> writes:

  b> Now how do I get this assigned to a new variable?

  b> define xxx
  b>   @TMP="$(shell echo $(1) | sed 's:\.: :g')"
  b>   echo ${TMP}
  b> endef

First, if you reference this variable $(xxx) in a command script context
(that is, after a TAB as the first character in a line after a target
definition), then the variable you're setting is a SHELL variable, not a
MAKE variable.

You can't set a MAKE variable from within a shell script: the script is
running in a subshell and of course the subshell cannot modify the
environment of its parent process (make).

Second, every line in a make command script is invoked in a separate
shell, and as just mentioned variables that are set in a shell are lost
as soon as the shell exits.  So, the first line sets the SHELL variable
TMP to the result of invoking ANOTHER shell command and doing the echo
and sed.

Then that shell exits (successfully), and the value of all shell
variables set is lost.  Make then invokes another shell to run the
second line, and that echoes the _MAKE_ variable $(TMP), which has not
been set to anything, and so it prints nothing.

  b> The echo prints an empty line
  b> I need to do
  b> if [ $(words ${TMP} = 2 ] ; then \
  b>   do something with $(word 2, ${TMP}); \
  b> else if [ $(words ${TMP} = 3 ] ; then \
  b>   do something with $(word 2, ${TMP}) && $(word 3, ${TMP}); \
  b> else if [ $(words ${TMP} = 4 ] ; then \
  b>   do somethingwith $(word 2, ${TMP}) && $(word 3, ${TMP}) && $(word 4,
  b> ${TMP}); \
  b> fi fi fi

You can't do that: you are trying to mix shell variables and make
variables.  It's crucial to keep the distinction between them bright in
your mind.

All make variables and functions in the command string are expanded
BEFORE the command is passed to the shell.  No shell variables are
"passed back" to make; that's impossible.


Go back to your original attempt, using a real make function that
actually exists (subst) instead of a non-existent function (substr) and
use a make variable, then you can use make functions like $(words ...)
in your command script and they'll work.

-- 
-------------------------------------------------------------------------------
 Paul D. Smith <psmith@gnu.org>          Find some GNU make tips at:
 http://www.gnu.org                      http://make.paulandlesley.org
 "Please remain calm...I may be mad, but I am a professional." --Mad Scientist