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Stats Updating... 5/18/2013 5:48:37 PM Top Users in comp.sys.powerpc.tech  richard68 (40) 40 Articles, 0 Replies, 40 Points
 alessio211734 (26) 16 Articles, 10 Replies, 26 Points
 Moti.cohen (4) 4 Articles, 0 Replies, 4 Points
 tugrul.guclu (54) 36 Articles, 18 Replies, 54 Points
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 tinkerer (31) 20 Articles, 11 Replies, 31 Points
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 bastian42 (358) 8 Articles, 350 Replies, 358 Points
 kfirdosh (1) 1 Articles, 0 Replies, 1 Points
Top Articles in comp.sys.powerpc.tech  sync and eieio instruction  4
 675 (4/18/2008 7:19:23 AM) Hi all. I have some problems with PowerPC syncronization instructions. In particular I would know when sync and eieio instructions must be used. I have the source code of a real time operating system for a s...   lc.flno (3) Problem getting HDLC tx interrupt 1
181 (2/8/2008 1:52:27 PM) Hi people, I've been trying to do a simple loopback test using HDLC/SCC. Here is my initialization sequence: 1) Set parallel io pins 30-31 for internal loopback pdird: 0x2 ppard: 0x3 psord: 0x2 2) set... yamanc (1) [G4 Mac OF] native code disassembler for ppc 7400 7450 7455... 0
246 (7/2/2008 12:41:25 AM) \ "dis.of" Public Domain replacement dis revised 30-Jun-2008 \ \ Revision history. This final revision of "Basic Form" dis.of \ contains the following improvements: \ \ * dcba included in G4 instruction ... tinkerer (31) Compact Flash interface with MPC8313E 0
158 (5/21/2008 5:18:20 AM) Hi , We have been working with Compact Flash interface with our powerpc based board and we are facing some difficulty in timing consideration for interfacing the CF in true IDE mode. we are usin... mfasil86 (2) Power Quicc 3 problem HW/SW ?? 0
179 (5/6/2008 7:27:55 AM) Hi all, Our MPC8548E is having problems loading the DDR2 memory (boot) from the driver burned on the flash. The DDR interface and flash interface (LBC) were tested stand alone and found to be working proper... Moti.cohen (4) lwarx and stwcx instruction 3
191 (9/30/2008 5:04:39 PM) I am working on a xlinx fpga with two powerpc that shared a bram memory. This instruction lwarx and stwcx are able to assure the two cpu can do atomically access in shared memory? I don't understand if this... alessio211734 (26) UPM Array for MPC8347 2
313 (6/30/2009 9:08:59 AM) Hi, How to generate UPM array for NAND Flash (k9k8g08u0a or K9WAG08U1A) for the MPC8347 (LBC Controller). Is this upm array dependent on the flash type. For geting the upm array should I contact freescale? ... kfirdosh (1) Multithreaded C code on a PS3 under linux 2
159 (3/18/2008 11:51:15 PM) Hi, I'm wondering if I write multithreaded C code or whatever on the PS3 using GCC or whatever, will the multiple threads make use of the 7 spu processing cores available? If not how exactly do you go abou...  sophie_newbie Message Queues (2.4 vs. 2.6) 3
149 (5/17/2008 1:38:10 AM) I am seeing a dramatic difference between 2.4.26 and 2.6.10 in how fast messages are transferred to a log file using a message queue, i.e., using msgsnd & msgrcv. On 2.4.26, the messages appear in the log f... Bill PowerPc MMU config for Memory protection only 1
210 (10/15/2008 10:01:27 PM) Hi all I need to use PowerPc 603E and I want only to use MMU for memory protection only without any virtual memory. Is that possible?. I don't need and don't have an RTOS in my embedded app, no tasks/thr... SbellStatistics Last Updated: 4/7/2013 12:00:00 AM |
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