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Synthesis Problem #2 8 58 (5/16/2012 1:25:18 AM) comp.arch.fpga I have this code written in verilog for a counter but my program xilinx ise 14.1 finds 2 errors: ERROR:Xst:899 - "numarator9.v" line 45: The logic for does not match a known FF or Latch template. The descript... Legalex