antispam_bogus's articles:

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Better then Gardner? 1 44 (6/22/2009 5:53:15 PM) comp.dsp Hello all, Classic Gardner timing detector: Gardner(x) = (x2 - x0)*x1 Where x0, x1, x2 are sampled in -1/2, 0, +1/2 of the symbol. Essentially this detector finds the derivative of the energy after the matc... Vladimir

Anti-cyclic code? 6 45 (5/23/2009 2:09:28 PM) comp.dsp There is an N-bit codeword. The question is how to design a code so any cyclic shift of a codeword will NOT be a valid codeword. This includes the special case when the shifted word equals to the original ... Vladimir

Detect wide band noise 7 34 (5/13/2009 2:46:54 PM) comp.dsp Hello All, I need to detect the bursts of the wide band noise in the sampled signal. The detector should ignore the narrow band pulses or the stationary signals. This is intended for blanking of the signal ... Vladimir

OT: Tech support? 4 44 (2/16/2009 4:22:01 PM) comp.dsp I contact the tech support only if I can't find the answer from the manuals and the datasheets. During the past year, I contacted the TI DSP support for 3 times. Each time I got automatic response with the ... Vladimir

GPS module good for timekeeping? 22 37 (2/10/2009 3:20:25 PM) comp.arch.embedded There is a data acquisition network of many units. Each unit is synchronized to the GPS. It turns out that the common OEM GPS modules have a nasty problem: the GPS time can suddenly jump by +/- 1 second onc... Vladimir

Christmas Greetings? 22 36 (12/21/2008 7:04:35 PM) comp.dsp Who's turn is congratulate us with Christmas? (Equal opportunity, environment friendly, politically correct, legal drinking age and other restrictions apply). VLV ... Vladimir

OT: Good EE books and project kits for little kids 28 38 (10/25/2008 7:38:57 PM) comp.dsp Can you suggest very basic EE tutorials, meccanos, project kits for little children? Something that should allow building and trying the simple circuits like amplifiers, oscillators, photosensors, logic gate... Vladimir

Anyone actually using FPGA? 30 42 (10/21/2008 4:33:43 PM) comp.dsp The formidable FPGAs (>10k cells) come with the very formidable price (starting at the order of $100 and growing exponentially with the number of cells). Building any of the hyped applications of FPGA will p... Vladimir

Partition table or boot sector? 13 50 (10/14/2008 2:58:20 PM) comp.arch.embedded I have encountered the following problem: It appears that some FAT32 formatted Compact Flash cards have the partition table whereas some other cards don't. This creates trouble during the initialization of ... Vladimir

HiFi equipment 40 69 (10/13/2008 11:21:42 PM) comp.dsp Well, we know about monster cables and such, however what do you think about this stuff: http://www.kosmic.us/access-acousticrevive.html :-) Vladimir Vassilevsky DSP and Mixed Signal Design Consultant htt... Vladimir

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Comparing timing between sinusoids at different freqs 11 41 (7/9/2009 4:18:27 PM) comp.dsp I have a requirement to measure the relative timing between two sinusoids for the purpose of determining the relative circuit delays between the sources and me. I have no control over the sources, but they a... nospam3582 (3)

DDS - PLL hybrid linear sweep synthesizer 6 38 (7/13/2009 3:07:01 PM) comp.dsp Dear professionals, I am interested in designing of a DDS / PLL hybrid linear sweep synthesizer. I would like to buy a DDS and PLL from Analog Devices. In my case the DDS would be able to produce a highly lin... kstatnikov (2)

Phase resolution in PLL at audio frequencies 17 37 (7/13/2009 3:07:21 PM) comp.dsp Hi all. I don't have much background in PLL implementation and would appreciate if someone can refer me to basic info. I need to measure the phase of an unmodulated 15 kHz tone down to 0.1 degree if possibl... gmwemail-dsp (15)

Cycle Slip in Viterbi and Viterbi Non-linear Phase Estimator 3 33 (7/14/2009 11:49:59 AM) comp.dsp Hi all, I am using Viterbi and Viterbi algorithm for estimating phase of the carrier in a 8psk demodulator. I am facing problem relating to cycle slips and observing that half of my burst is demodulated correct... aitezaz.abd (54)

Any advise for a hobbyist to select the Kit? 11 35 (7/5/2009 6:52:35 AM) comp.dsp Hi..folks.., For a generic hobbyist, Could you people suggest any FOSS kit for the most of the signal processing stuff(" more emphasis on thr Image stuff"), if it is GUI enabled then, I'm the luckies... mparker5809 (4)

Hi-Tech Software bought by Microchip - no more other compilers 125 62 (7/6/2009 9:05:39 AM) comp.arch.embedded Does anybody know what has happened to their old compilers e.g. H8/300 or Z180? Is somebody buying the rights to these products? x----------x ... nobody (4805)

Parabola interpolation 12 41 (7/8/2009 8:56:05 AM) comp.dsp I learned a parabola interpolation equation from some articles, but I am puzzled with the rationality. It is as follws. E = I - 1/2*[ R(I+1) - R(I-1)] / [R(I+1) + R(I+1) - 2*R(I)] where, 3 given points is R(... hyeewang (87)

Is multistage rate-changing actually more efficient? 10 38 (7/9/2009 12:10:15 AM) comp.dsp Hello all, This is a question which probably boils down to "what am I missing?". It seems to be commonly stated that for interpolation or decimation, it's generally more computationally efficient to perform t... catch (918)

DSP code security? 2 45 (7/9/2009 2:37:02 PM) comp.dsp I hear people say that code in DSP flash is safer than in ROM, in terms of preventing reverse engineering. Could anyone tell me more about this? We are choosing chip for our h.264 decoder. Code security is a m... wuwuengr7777777 (1)

BER performance of BPSK OFDM in AWGN channels 2 33 (7/9/2009 2:37:25 PM) comp.dsp I am currently testing OFDM using BPSK modulation using the FEC (convolutional coding), since my bits are random 0s and 1s and without using a quantiser or interleaver, the channel that is used for testing is A... omcio (1)