New Merrick6 Version066 (4/24/2012 3:40:14 PM) comp.arch.fpga From customer demand we are doing a cut down Merrick6 with only 2 way array XC6SLX150 FPGAs (without DDR fitted in array) plus the XC6SLX150T that controls the everything on the board. This new board variant is... John
Free Seminars/Labs - Implementing PCI Express Designs in FPGAs650 (4/4/2012 10:03:41 PM) comp.arch.fpga Having not done any free seminars for a while we now fixing that by running 2 sets of seminars in May and possibly into June if we add some more dates. Both sets of seminars are based on the implementation of a... John
Enterpoint New Boards353 (11/14/2011 2:49:31 AM) comp.arch.fpga We have some new, and some not so new, offerings this week. The first out is a new member of the Merrick family. Merrick3 has 26 FPGAs and if that's not enough we can stack these boards. Details on http://enter... John
Enterpoint Recruiting052 (7/14/2011 9:13:43 PM) comp.arch.fpga It's been a while since I have said this in public but we are recruiting again for our UK office. Details on http://www.enterpoint.co.uk/careers/job14072011.html. This one covers a pile of skill bases and open ... John
XC6SLX150 Coprocessor Modules258 (7/12/2011 7:28:39 AM) comp.arch.fpga Two new FPGA coprocessor modules released today. The initial availability will be modules based on a Xilinx Spartan-6 XC6SLX150 FPGA although we may offer these products with either a XC6SLX45 or XC6SLX75 optio... John
XC3SD3400A Coprocessor Module256 (5/2/2011 1:26:51 PM) comp.arch.fpga Also new this week is our XC3SD3400A Coprocessor module. Not surprisingly it is based on a Xilinx Spartan-3A DSP XC3SD3400A FPGA. Module has JTAG, SPI configuration and a 6A core voltage regulator as support fe... John
Raggedstone3 - Altera PCIe Development Board552 (5/2/2011 12:42:08 PM) comp.arch.fpga If you didn't see it already in our our newsletter we have a new PCIe devopment board based on an Altera Cyclone-IV GX. The new board keeps most of the mechanicals and features of our Raggedstone product range ... John
Polmaddie Low Cost CPLD/FPGA Boards Update0143 (6/22/2010 7:18:53 PM) comp.arch.fpga There are now new user manuals and schematics for Polmaddie1, Polmaddie2 and Polmaddie3 boards. Polmaddie4 and Polmaddie5 to follow shortly. Jump page to all of these boards http://www.enterpoint.co.uk/polmaddi... John
Prog4 - Altera Programming Cable and a development board in one.1231 (6/13/2010 1:15:19 PM) comp.arch.fpga In prep for the release of more Altera development board additions to
our range we have a new programming cable Prog4. We will be selling
this 2 ways. The first is as a programming cable and that will be in a... John
Raggedstone2 Spartan-6 Board Update0146 (4/20/2010 5:37:12 PM) comp.arch.fpga We have the Raggedstone2 in test now and expect to start shipping this
board shortly. Picture of complete board is now on
http://www.enterpoint.co.uk/raggedstone/raggedstone2.html. There
should be some more ... John
voltage drop on STRATIX FPGA supply planes1264 (1/6/2012 9:55:03 AM) comp.arch.fpga Guys I'm doing hyperlynx power integrity analysis on a Stratix 4 0v9 power plane. It is showing a 30mV voltage drop across the BGA itself, let alone getting the power to the BGA which is dropping another 50mV.... colin_toogood(42)
A smallish starter Kit for led control352 (2/3/2012 4:07:50 PM) comp.arch.fpga I would like to see what kind PWM LED control I could do with FPGA and of course just play with the kit to see what else I can do with it. A FPGA (kit)with plenty of pins and low price is good. I am not willin... sala.nimi(17)
Xilinx Artix-7 availability4118 (2/4/2012 12:14:46 PM) comp.arch.fpga did anybody hear something about the availability about the Xilinx Artix-7 series? Especially I am interested in the XC7A8 or XC7A15 in the FTG256 Package. regards Arne ... arne6338(4)
Internal BUS design: MUX or OR-GATE?759 (3/13/2012 2:32:28 AM) comp.arch.fpga Hello, I have an internal BUS for all the registers in different modules. I found it is inconvenient to build a MUX for the read BUS, instead I want to just OR all the buses together (output 0 when deselected)... heavenfish(5)
Low latency FPGA options350 (4/1/2012 6:14:38 AM) comp.arch.fpga Hello, I am looking to use FPGA's as specialized coprocessors to increase performance on different applications. I would like the lowest latency possible to memory. I have only found options with PCIE and Hype... jfix71(2)
Free Seminars/Labs - Implementing PCI Express Designs in FPGAs650 (4/4/2012 10:03:41 PM) comp.arch.fpga Having not done any free seminars for a while we now fixing that by running 2 sets of seminars in May and possibly into June if we add some more dates. Both sets of seminars are based on the implementation of a... g1(82)
Watchdog reset for fpga designs455 (4/7/2012 7:28:23 AM) comp.arch.fpga hi i 'm designing a board with fpga spartan 3(Industrial series) . while testing the board, specially when there is spike on any input pin of fpga, fpga enters unknown sate and won't do its job correctly, but a... nba_baheri1(11)
Best FPGA for algorithmic acceleration951 (4/9/2012 5:13:41 AM) comp.arch.fpga Hello, I'm looking at different options to use FPGAs as coprocessors for algorithmic acceleration. Between the Xilinx Virtex 6 (LXT or SXT), or the Altera Stratix IV (360, 530 or 820), what would be my best op... jfix71(2)