jjlarkin's articles:

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Altera delivery 18 53 (10/26/2012 3:24:14 PM) comp.arch.fpga We are seeing huge leadtimes on Altera FPGAs, specifically Arria II GX65 and 95. Numbers like 20 weeks and worse. Is this specific to Altera, or to Arria parts? I wonder if all the cell phones and tabl... John

Altera GX45 to GX95 upgrade 0 61 (8/25/2012 4:48:06 PM) comp.arch.fpga Hi, We designed a board that uses an Arria II GX45 chip. We didn't initially figure to use all its resources, but the customer keeps piling on requirements and we've run out of stuff inside. The origin... John

LPC1768 USB hangup 24 60 (7/7/2012 7:19:04 PM) comp.arch.embedded We built a little picosecond pulse generator box with a USB interface. The USB is directly into an LPC1768 NXP ARM chip, and we're using the USB stack and inf file that Code Red provided. It enumerates as... John

Altera FPGA weirdness 17 57 (10/19/2011 1:15:24 AM) comp.arch.fpga Hi, We have a new board we just designed, and we're trying to fire up the first one. http://www.panoramio.com/photo/60806547 It has an Altera EP2AGX45DF29C5N on board; says so right on the label. When we ho... John

cheating Arria FPGA i/o count 19 51 (8/27/2011 10:58:29 PM) comp.arch.fpga Hi, I'm designing a pretty horrible board (33 page schematic!) that will use an Altera Arria II GX in the 572BGA package. There are 240 pure I/O pins in this package, and 12 dedicated clock pins. I'm getting c... John

PCI Express Cable 10 72 (5/25/2011 8:14:57 PM) comp.arch.fpga Hi, Does anybody here have experience designing something to do PCIe over cable? I need to design (ie, draw the schematic of) a target device that will have a Molex cable/connector coming in, some Pericom or s... John

PADS footprint for PEX8311 0 45 (5/28/2009 11:52:03 PM) comp.arch.embedded Hi, Does anyone have the PADS part layout for the PLX PEX8311 chip? That's a 377-pin BGA, PCI Express interface chip. Tnx, John ... John

68332 horrible crash 10 78 (3/9/2009 4:46:55 AM) comp.sys.m68k Situation: an FPGA drives the IRQ6 input, the portF pin. It's set up to use another chip select as the autovector generator. This mostly works. The FPGA pulls it low, the ISR runs, and the ISR pokes the FPGA ... John

FFT timing 32 59 (4/19/2008 2:42:26 AM) comp.arch.embedded Hi, Does anybody have an estimate of how long it might take to do a million-point FFT on a modern Intel PC? Google is no help. Our data would be from a 16-bit ADC, but I get the impression that, on an Intel m... John

feeding a FIFO from PCI 32 40 (4/12/2008 4:38:30 PM) comp.os.linux.hardware Hi, I'm working on a proposal to design a box that will control a scientific gadget. Our box will output frequency sweeps, arbitrary waveforms, a couple of dozen voltages that can be changed/ramped per user de... John

jjlarkin's replies:

Items(114) /12 Next >> Last >|

Pi approximation games 148 63 (5/1/2012 11:16:25 PM) comp.dsp Instead of doing productive work, I just spent a few enjoyable minutes with Scilab finding approximations to pi of the form m/n. Because I'm posting to a couple of nerd groups, I can be confident that most o... tim177 (4406)

OT: A "decomposed" business structure 43 47 (5/12/2012 6:34:26 AM) comp.arch.embedded Hi, I suspect many folks have telecommuted, worked off-site, etc. As regular employees, subcontractors, etc. And, possibly with many *other* such INDEPENDENT people at the same time. But, in my experience, ... not8737 (51)

A Sign of a Real Engineer 42 48 (6/23/2012 3:03:06 AM) comp.arch.embedded So, my #1 son, 19, was in the hospital for surgery. (Nothing life threatening, but one of those Must Be Done things). He's coming out of general anesthesia, still woozy, and the nurse is explaining the ... tim866 (394)

LPC1768 USB hangup 24 60 (7/7/2012 7:19:04 PM) comp.arch.embedded We built a little picosecond pulse generator box with a USB interface. The USB is directly into an LPC1768 NXP ARM chip, and we're using the USB stack and inf file that Code Red provided. It enumerates as... jjlarkin (616)

PLL Terminology Question 72 59 (10/11/2012 8:36:55 PM) comp.dsp How commonly do you see PLL designs referred to as "type I", "type II", "type III", etc.? Do the terms make sense to you? I'm writing a report; don't want to either baffle with bullshit nor leave out ha... tim177 (4406)

Altera delivery 18 53 (10/26/2012 3:24:14 PM) comp.arch.fpga We are seeing huge leadtimes on Altera FPGAs, specifically Arria II GX65 and 95. Numbers like 20 weeks and worse. Is this specific to Altera, or to Arria parts? I wonder if all the cell phones and tabl... jjlarkin (616)

baud rate autodetection on AVR 8-bit? 70 36 (12/7/2012 2:17:16 PM) comp.arch.embedded BTW, is there an easy way to autodetect the baud rate while using an AVR UART? (Preferably something that works with ATmega8, given that those MCU's are such a cheap thing nowadays.) There're some i... oneingray (254)

Where to move for an embedded software engineer. 19 44 (12/10/2012 1:04:02 AM) comp.arch.fpga I assume the bay area is number one for embedded software engineers, but where else are the big markets, as companies run from califoria taxes. Denver, CO - Does big population mean high tech? Phoenix, AZ ... notaclue (2)

Sine Lookup Table with Linear Interpolation 120 19 (3/16/2013 10:30:51 PM) comp.dsp I've been studying an approach to implementing a lookup table (LUT) to implement a sine function. The two msbs of the phase define the quadrant. I have decided that an 8 bit address for a single quadrant ... gnuarm (2644)

"ethics" (?) of forced supply purchases 53 45 (4/16/2012 2:05:52 AM) comp.arch.embedded Hi, I'm curious as to the ethical issues (opinions) regarding tying customers into a particular supplier ("yourself") for ongoing product "consumables". [E.g., Joe Computer User purchasing printer supplies fr... this2997 (207)