Since 4/2/2012 5:22:56 AM, laserbeak43 has written 9 articles and participated in 2 conversations. laserbeak43 signature: laserbeak43
laserbeak43's articles:
Items(9) /1
Not understanding what makes my code turn to latches.969 (8/18/2010 9:11:14 PM) comp.lang.vhdl Hello, I'm writting some code(lab 6 part 1 of the Altera DE2 VHDL exercises) and i keep getting this warning, that some of my signals and I/O are going to be latched. I don't understand what makes this happen, ... laserbeak43
Making a timer out of TFFs15116 (6/4/2010 5:53:03 AM) comp.lang.vhdl Hello, I've tried making a 16 bit timer out of TFFs using this code: ///////////////////////////////////////////////////////////////////////////////////////////////////////////// entity myTFF is port( T, Clk, ... laserbeak43
DSP with Digital Components?4182 (3/9/2010 4:08:06 PM) comp.lang.vhdl Hello,
I want to learn DSP, but most teaching methods i've seen involve some
form of BASIC. I want to learn to create DSP applications from actual
digital components. I was wondering if someone had some sort... laserbeak43
Xilinx's version of Quartus' Signaltap?7398 (12/6/2009 12:39:41 AM) comp.lang.verilog Hello,
I've just been shown Signaltap, A feature in Quartus Webpack
Edition. Does the Webpack Edition of ISE have this feature? WOW this
alone can convince me to use Altera products.
Could someone ple... laserbeak43
Weird warnings0170 (11/17/2009 9:27:04 PM) comp.lang.verilog Hello,
I've been woking on getting the LCD on my Spartan 3E Starter Kit board
to work without the use of PicoBlaze. I've managed to get an init
sequence, but I cannot get a write or read working. I get lots ... laserbeak43
Constant Values of 03282 (10/27/2009 11:58:12 AM) comp.lang.verilog Hello,
ISE is giving me a warning:
":Xst:1710 - FF/Latch (without init value) has a constant
value of 0 in block . This FF/Latch will be trimmed during the
optimization process"
When clicking the wa... laserbeak43
Verilog modules and stimulus in same file8139 (8/16/2008 8:43:19 AM) comp.arch.fpga Hi, i have some verilog code that i want to keep for future use as a part of a library. I have created the module and am working on the stimulus. if i were to put the module and stimulus in the same file, would... laserbeak43
how to make sounds with C++736 (8/29/2007 5:12:01 AM) comp.dsp hi, how would i go about creating something that makes sound and sending it to an output so i can hear it? sorry for the very simple question, but what i want to do is learn how to make sounds(as low-level as i... laserbeak43
laserbeak43's replies:
Items(2) /1
how to make sounds with C++736 (8/29/2007 5:12:01 AM) comp.dsp hi, how would i go about creating something that makes sound and sending it to an output so i can hear it? sorry for the very simple question, but what i want to do is learn how to make sounds(as low-level as i... laserbeak43(11)
my array subset method could be improved?417 (10/14/2005 12:46:58 PM) comp.lang.python Hi all I have an array a=array([2,3,1]). I want to extract an array with all the elements of a that are less than 0. Method 1. new = array([i for i in a if i < 0]) Method 2. new = a[nonzero(a<0)] I'm using... jbo5378(30)