lastval's articles:

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simulation+configuration with Ethernet Lite MAC (xilinx) 0 650 (1/25/2010 7:44:01 PM) comp.arch.fpga Hello all, I am trying to test configure and test one design using microbl;aze and xps_ethernetlite. I am making a testbench for the modelsim but it is doesnt work. i am trying to find a tutorial/example f... xenix

OPB timer Microblaze 2 153 (2/6/2008 9:26:44 AM) comp.arch.fpga Hello all. below is a part of my code for an OPB timer attached to a Microblaze with no inerrupts. the timer counts correct but when reaches the value 0xFFFFFFFF ( end point) should roll over and start again co... xenix

how to make ports visible? 1 84 (11/13/2007 1:41:23 PM) comp.arch.fpga Hello all, I am trying to make the PORT B of a BRAM visible in EDK ver.6.2i . The only ports can make visible from PORT B is only the CLK. have you any idea how to do the rest ports of BRAM PORT B visible? ... xenix

how to write data? 2 53 (11/9/2007 11:44:21 AM) comp.lang.vhdl hello all, i would like to ask how i can load a memory ip with 4 packets of 64bytes of data using VHDL? i am looking for hints in coding style and syntax. regards:) xenix ... xenix

is marked OBSOLETE???? 1 80 (11/9/2007 9:58:10 AM) comp.arch.fpga hello all, i would like to ask if you can give me a hint on this problem "ERROR:MDT - Ip ppc405 2.00.a is marked OBSOLETE" in edk6.2 version. thank you all:) ... xenix

ERROR:MDT - transparent bus interface connector 2 84 (11/6/2007 1:50:28 PM) comp.arch.fpga Hello all, I am facing the error below when i am doing generate libs and BSB's. ERROR:MDT - transparent bus interface connector 'xxx_bram' is only referenced once! any views? I am using XPS 6.2 vers... xenix

xilinx Edititons 4 85 (10/18/2007 10:27:38 AM) comp.arch.fpga Hello all, I would like to ask if i can install in my computer 2 different versions of EDK, one older than the other. O/S : Windows XP regards xenix ... xenix

IPs in MHS file 2 122 (10/17/2007 8:29:36 AM) comp.arch.fpga Hello all:) I am running a design in edk 6.1 version. and comes up with " Makefile cannot be saved to run process. Please ensure IPs in MHS file point to the right MPDs". The MHS doesnt contain info about M... xenix

Compiler Options 2 90 (10/10/2007 11:38:35 AM) comp.arch.fpga Hella all:) I would like to ask for the complier option in the XILINX EDK. I have written ans inline assembly code. and simulation in Modelshim. When i am compling the code i said "No Optimization". But in ... xenix

Data-side BRAM 0 80 (9/18/2007 12:37:57 PM) comp.arch.fpga Hello All, there is a 32bit Data Bram. I am trying to load a 32 bits data in the fourth location (4) of the Bram (0-255 locations). The addresses are : Address Map for Processor ppc405_0 (0b0000010000-0b000001... xenix