taileb.mehdi's articles:

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Spartan-6 - What is the IODRP2_MCB?? 1 392 (8/26/2010 10:43:55 PM) comp.arch.fpga Hi, While studying the MIG ref design for Spartan-6 I was surprised to find a IODRP2_MCB which doesn't have any documentation. Any information about it? Thanks ... windows

Reed-Solomon decoder 1 55 (12/19/2007 6:50:26 AM) comp.arch.embedded Hi every body, Is it possible to implement a reed-solomon decoder (8-bit words, 255, 239) on microcontroller/dsp processor or such? The decoding has to be done at 10Mb/s and on the fly. I have implemented such... ISO

Dynamic Reconfiguration books 7 102 (10/18/2007 12:52:54 PM) comp.arch.fpga Hi everybody! I would like to get advises about good books in dynamic reconfiguration using FPGAs. I need theoretical (algorithms, methods) as well as practical information. Thanks in advance ... utf

Boot loaders in Microcontrollers 14 42 (9/15/2007 11:08:58 AM) comp.arch.embedded A stupid question: Do some microcontrollers come with preprogrammed bootloaders? Mehdi ... utf

Is post-place and route simulation useful? 6 83 (9/14/2007 7:57:59 AM) comp.arch.fpga Hi, Is the post place&route simulation so important? IMHO doing post synthesis (or post translate) simulation for verifying behavior than doing a post place and route static timing analysis is sufficient and le... utf

Hogenauer paper 1 30 (8/28/2007 1:58:49 PM) comp.dsp I'm currently designing CIC filters, I found that almost all are referring to the following paper: E=2E B. Hogenauer, =E2=80=9CAn Economical Class of Digital Filters for Decimation and Interpolation=E2=80=9D. I... utf

Virtex-4 troubles after configuration 0 95 (6/1/2007 11:07:25 AM) comp.arch.fpga Hi everybody, After successfull configuration of a Virtex-4 my design has troubles. But if I reconfigure using the same bitstream the problem is solved. Did others met this problem? how to solve it? Thanks in ... utf

DCIRESET in Virtex-4 1 100 (5/2/2007 6:06:05 AM) comp.arch.fpga Hi everybody, My question concerns DCI and temperature. If the temperature of the chip changes considarably between the end of the init process and the normal functionning, is it a good idea to instantiate the ... utf

VIrtex-4 FIFO16 2 97 (4/10/2007 10:33:45 AM) comp.arch.fpga Hi everybody, In the new version (2.1) of the Virtex-4 User Guide (ug070), in the FIFO chapter is described the synchronous clock work-around (page 161) to solve the FIFO bug. At the end of the paragraph the fo... utf

MIG under Linux 0 105 (4/4/2007 7:01:19 AM) comp.arch.fpga Hi everybody, Did someone tried to install MIG under Linux using Wine? Cheers Mehdi ... utf

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Boot loaders in Microcontrollers 14 42 (9/15/2007 11:08:58 AM) comp.arch.embedded A stupid question: Do some microcontrollers come with preprogrammed bootloaders? Mehdi ... taileb.mehdi (54)